The sender domain has a DMARC Reject/Quarantine policy which disallows
sending mailing list messages using the original "From" header.
To mitigate this problem, the original message has been wrapped
automatically by the mailing list software.
--- Begin Message ---
Quoting Daniel Santos <daniel.san...@pobox.com>:
Hi Daniel,
Ah hah! I've found my answer on page 340 (414. PIAC: PHY Indirect Access
Control(offset:0x7004)) and in mt7620_gsw_config:
static int mt7620_gsw_config(struct fe_priv *priv)
{
struct mt7620_gsw *gsw = (struct mt7620_gsw *) priv->soc->swpriv;
/* is the mt7530 internal or external */
if (priv->mii_bus && mdiobus_get_phy(priv->mii_bus, 0x1f)) {
mt7530_probe(priv->dev, gsw->base, NULL, 0);
mt7530_probe(priv->dev, NULL, priv->mii_bus, 1);
} else {
mt7530_probe(priv->dev, gsw->base, NULL, 1);
}
return 0;
}
So priv->mii_bus is non-null when the chip's network hardware is
external because the similarly (and confusingly) named mt7530 is only
the switch hardware, where as the mt7620 is a full µC that has an mt7530
integrated into it. Which leads me to the question of what "GSW"
means? This is the name of the hardware that has the PIAC register, but
nowhere in the data sheet or programming guide can I find a definition.
GSW = Gigabit Switch.
Quote out of an old patch see https://lkml.org/lkml/2018/3/14/1044
"Although the builtin MT7530 is gbit capable, the builtin PHYs are
only 100mbit."
Greats,
René
Thanks,
Daniel
On 6/14/19 5:53 PM, Daniel Santos wrote:
Hello,
I'm still fairly new to Ethernet drivers and there are a lot of
interesting pieces. What I need help with is understanding MDIO -->
(R)MII vs direct I/O to the MAC (e.g., via ioread32, iowrite32). Why is
there not always a struct mii_bus to talk to this hardware? Is it
because the PHY and/or MAC hardware sometimes attached via an MDIO
device and sometimes directly to the I/O bus? Or does some type of
"indirect access" need to be enabled for that to work?
I might be trying to do something that's unnecessary however, I'm not
sure yet. I need to add functionality to change a port's
auto-negotiate, duplex, etc. I'm adding it to the swconfig first and
then will look at adding it for DSA afterwards. When I run "swconfig
dev switch0 port 0 show", the current mt7530 / mt7620 driver is querying
the MAC status register (at base + 0x3008 + 0x100 * port, described on
pages 323-324 of the MT7620 Programming Guide), so I implemented the
"set" functionality by modifying the MAC's control register (offset
0x3000 on page 321), but it doesn't seem to change anything. So I
figured maybe I need to modify the MII interface's control register for
the port (page 350), but upon debugging I can see that the struct
mii_bus *bus member is NULL.
So should I be able to change it via the MAC's control register and
something else is wrong? Why is there no struct mii_bus? Can I talk to
the MII hardware in some other way?
Thanks,
Daniel
https://download.villagetelco.org/hardware/MT7620/MT7620_ProgrammingGuide.pdf
--
Met vriendelijke groet,
René van Dorst
--- End Message ---
_______________________________________________
openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel
