Hello Christian,

On 27.02.19 13:03, David Bauer wrote:
Hello Christian,

On 26.02.19 23:17, Christian Lamparter wrote:
Hello David,

On Tuesday, February 26, 2019 12:15:41 AM CET David Bauer wrote:
On 25.02.19 23:10, Christian Lamparter wrote:
On Wednesday, February 20, 2019 6:02:21 PM CET Christian Lamparter wrote:
On Monday, February 18, 2019 11:58:34 PM CET David Bauer wrote:
diff --git 
a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
 
b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
new file mode 100644
index 0000000000..b2a33468bb
--- /dev/null
+++ 
b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-fritzbox-7530.dts
@@ -0,0 +1,305 @@
+&pcie0 {
+       status = "okay";
+
+       ranges = <0x81000000 0 0x40200000 0x40200000
+                       0 0x00100000   /* downstream I/O */
+                       0x82000000 0 0x48000000 0x48000000
+                       0 0x10000000>; /* non-prefetchable memory */

Let me dig out my MR33 (will have to wait until the Weekend) and see if this
should be put into the qcom-ipq4019.dtsi as well.

And it didn't work. While the pcie enumeration worked fine.
The QCA9887 was no longer attaching. As soon as the driver was
loaded it failed due to:

[    8.888466] ath10k_pci 0000:01:00.0: enabling device (0140 -> 0142)
[    8.934145] ath10k_pci 0000:01:00.0: failed to wake up device : -110
[    8.935258] ath10k: failed to probe PCI : -110, retry-count: 0
[    8.949596] ath10k 4.19 driver, optimized for CT firmware, probing pci 
device: 0x50.
[    8.989503] ath10k_pci 0000:01:00.0: failed to wake up device : -110
[    8.989899] ath10k: failed to probe PCI : -110, retry-count: 1
[    9.005086] ath10k 4.19 driver, optimized for CT firmware, probing pci 
device: 0x50.
[    9.046821] ath10k_pci 0000:01:00.0: failed to wake up device : -110
[    9.049851] ath10k: failed to probe PCI : -110, retry-count: 2
[    9.062448] ath10k 4.19 driver, optimized for CT firmware, probing pci 
device: 0x50.
[    9.099055] ath10k_pci 0000:01:00.0: failed to wake up device : -110
[    9.099442] ath10k: failed to probe PCI : -110, retry-count: 3
[...]
[    9.489869] ath10k: failed to probe PCI : -110, retry-count: 10
[    9.503780] ath10k_pci: probe of 0000:01:00.0 failed with error -110
[...]

But I think we can fix the problem. Because according to the old
qcom-ipq40xx.dtsi I dug up:

<https://github.com/gl-inet/openwrt-imagebuilder-ipq806x/blob/master/build_dir/target-arm_cortex-a7_uClibc-1.0.14_eabi/linux-ipq806x/linux-3.14.77/arch/arm/boot/dts/qcom-ipq40xx.dtsi#L631>

The non-prefetchable memory area window size should be 0x00d00000.

        ranges =        <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, /* 
downstream I/O */
                                <0x82000000 0 0x40300000 0x40300000 0 
0x00d00000>; /* non-prefetchable memory */

(yes, I'll be preparing a patch for linux-msm-arm. Can you please let
me know if does indeed finally let you enumerate the device?)

It seems to work with your proposed change:

[    0.042117] OF: PCI: host bridge /soc/pci@40000000 ranges:
[    0.042152] OF: PCI:    IO 0x40200000..0x402fffff -> 0x40200000
[    0.042171] OF: PCI:   MEM 0x40300000..0x40ffffff -> 0x40300000
[    0.259505] qcom-pcie 40000000.pci: link up
[    0.259649] qcom-pcie 40000000.pci: PCI host bridge to bus 0000:00
[    0.259671] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.259687] pci_bus 0000:00: root bus resource [io  0x0000-0xfffff]
(bus address [0x40200000-0x402fffff])
[    0.259700] pci_bus 0000:00: root bus resource [mem
0x40300000-0x40ffffff]
[    0.259742] pci 0000:00:00.0: [17cb:1001] type 01 class 0x060400
[    0.259776] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00000fff 64bit]
[    0.259829] pci 0000:00:00.0: PME# supported from D0 D3hot
[    0.260015] PCI: bus0: Fast back to back transfers disabled
[    0.260195] pci 0000:01:00.0: [8086:09a9] type 00 class 0x028000
[    0.260312] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x007fffff]
[    0.260790] pci 0000:01:00.0: supports D1 D2
[    0.260797] pci 0000:01:00.0: PME# supported from D0 D1 D3hot D3cold
[    0.261043] PCI: bus1: Fast back to back transfers disabled
[    0.261095] pci 0000:00:00.0: BAR 8: assigned [mem 0x40800000-0x40ffffff]
[    0.261112] pci 0000:00:00.0: BAR 0: assigned [mem
0x40300000-0x40300fff 64bit]
[    0.261136] pci 0000:01:00.0: BAR 0: assigned [mem 0x40800000-0x40ffffff]
[    0.261164] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[    0.261180] pci 0000:00:00.0:   bridge window [mem 0x40800000-0x40ffffff]
[    0.261891] pcieport 0000:00:00.0: AER enabled with IRQ 93

See
https://github.com/blocktrron/openwrt/commit/cc1a94b2e1616d33698852df38ae23f72f193b74

How should we proceed on this device? Should i resend a v3 or will you
remove the ranges property and backport the patch you prepare for upstream?

Sorry for the late reply, I added a rebased version
on top of the latest changes) into my staging tree:
https://git.openwrt.org/?p=openwrt/staging/chunkeey.git;a=commit;h=206a40911118f24c062ccdfc24dfc3fdd653c71a

And it turned out that there was also a pcie msi irq fix
https://git.openwrt.org/?p=openwrt/staging/chunkeey.git;a=commit;h=307f6a6ed6cfca4c0d3cb5dc4dc5493ec3f41e1c
it just goes on and on and on...


Thanks! I will test an image built from your staging tree this evening
and give feedback.

I've built on commit 206a40911118f24c062ccdfc24dfc3fdd653c71a in your staging tree and the resulting image works flawlessly.

Best wishes
David


Best wishes
David

Regards,
Christian



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