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Hi!
While adding support to LibreRouter v1 board, that has 2 mpci boards, I
found two bugs on the definition of the pci resources that only arise when
using both pci at the same time (none of the boards already supported in ath79
has 2 pci).

These changes fix qca955x dual pci support in a backwards compatible way.
Here are some dmesg of test runs applying these changes (over
0465e41e0532ae54c2018ddbfa01927a9b594769):

Before the first patch, enabling pcie0 and pcie1:
[    0.131911] PCI host bridge /ahb/apb/pcie-controller@180c0000 ranges:
[    0.138778]  MEM 0x0000000010000000..0x0000000013ffffff
[    0.144362]   IO 0x0000000000000000..0x0000000000000000
[    0.150229] PCI host bridge /ahb/apb/pcie-controller@18250000 ranges:
[    0.157120]  MEM 0x0000000012000000..0x0000000013ffffff
[    0.162676]   IO 0x0000000000000000..0x0000000000000000
[    0.168238] Skipping PCI bus scan due to resource conflict
[    0.189522] PCI host bridge to bus 0000:00

After the first patch, the MEM addresses are ok but IO has conflicts:
[    0.131910] PCI host bridge /ahb/apb/pcie-controller@180c0000 ranges:
[    0.138770]  MEM 0x0000000010000000..0x0000000011ffffff
[    0.144353]   IO 0x0000000000000000..0x0000000000000000
[    0.150224] PCI host bridge /ahb/apb/pcie-controller@18250000 ranges:
[    0.157119]  MEM 0x0000000012000000..0x0000000013ffffff
[    0.162676]   IO 0x0000000000000000..0x0000000000000000
[    0.168238] Skipping PCI bus scan due to resource conflict

After the second patch, all good:
[    0.131909] PCI host bridge /ahb/apb/pcie-controller@180c0000 ranges:
[    0.138770]  MEM 0x0000000010000000..0x0000000011ffffff
[    0.144354]   IO 0x0000000000000000..0x0000000000000000
[    0.150220] PCI host bridge /ahb/apb/pcie-controller@18250000 ranges:
[    0.157112]  MEM 0x0000000012000000..0x0000000013ffffff
[    0.162667]   IO 0x0000000000000001..0x0000000000000001
[    0.183692] PCI host bridge to bus 0000:00
[    0.188058] pci_bus 0000:00: root bus resource [mem 0x10000000-0x11ffffff]
[    0.195405] pci_bus 0000:00: root bus resource [io  0x0000]
[    0.201334] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    0.208556] pci_bus 0000:00: No busn resource found for root bus, will use 
[bus 00-ff]
[    0.217397] pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1001ffff 
64bit]
[    0.225218] pci 0000:00:00.0: BAR 6: assigned [mem 0x10020000-0x1002ffff 
pref]
[    0.233021] PCI host bridge to bus 0000:01
[    0.237403] pci_bus 0000:01: root bus resource [mem 0x12000000-0x13ffffff]
[    0.244710] pci_bus 0000:01: root bus resource [io  0x0001]
[    0.250640] pci_bus 0000:01: root bus resource [??? 0x00000000 flags 0x0]
[    0.257856] pci_bus 0000:01: No busn resource found for root bus, will use 
[bus 01-ff]
[    0.266688] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x1201ffff 
64bit]
[    0.274481] pci 0000:01:00.0: BAR 6: assigned [mem 0x12020000-0x1202ffff 
pref]

Test with pcie0 disabled and pcie1 enabled (emulating some devices with
only pcie1)
The pcie1 bus is still numbered 0 so this patches shold be backwards
compatible:
[    0.131920] PCI host bridge /ahb/apb/pcie-controller@18250000 ranges:
[    0.138787]  MEM 0x0000000012000000..0x0000000013ffffff
[    0.144371]   IO 0x0000000000000001..0x0000000000000001
[    0.165180] PCI host bridge to bus 0000:00
[    0.169544] pci_bus 0000:00: root bus resource [mem 0x12000000-0x13ffffff]
[    0.176891] pci_bus 0000:00: root bus resource [io  0x0001]
[    0.182818] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    0.190042] pci_bus 0000:00: No busn resource found for root bus, will use 
[bus 00-ff]
[    0.198881] pci 0000:00:00.0: BAR 0: assigned [mem 0x12000000-0x1201ffff 
64bit]
[    0.206704] pci 0000:00:00.0: BAR 6: assigned [mem 0x12020000-0x1202ffff 
pref]

Best,
SAn
PS: this is my first contribution to openwrt!

Santiago Piccinini (2):
  ath79: fix qca955x pcie0 memory size
  ath79: fix qca955x dual pci resource allocation

 target/linux/ath79/dts/qca9557.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.20.1



--- End Message ---
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