Hello, I have been playing with a ZyXEL WAP6805, which appears to be an OEM version of the https://wikidevi.com/wiki/ZyXEL_WAP6806_(Armor_X1)
This thing has an oversized mini-PCIe Quantenna module. Or that's the mechanical form factor. The connection between the MT7621 and the Quantenna QT3840BC appears to be RGMII, ref the OEM bootlog below. Notice how this brings up both eth2 and eth3 and add them to the br0 bridge. The Quantenna module loads u-boot and a firmware image using tftp, and it is then managed over the ethernet interface. So I was looking for a quick way to enable the second ethernet port on the MT7621, but can't find any. Am I looking the wrong place, or am I right that the support for this is still lacking? Any idea how many bits and pieces are missing? Bjørn Linux version 2.6.36+ (max@localhost.localdomain) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #23 SMP Fri May 20 09:28:27 CST 2016 The CPU feqenuce set to 880 MHz GCMP present CPU revision is: 0001992f (MIPS 1004Kc) Software DMA cache coherency Determined physical RAM map: memory: 04000000 @ 00000000 (usable) Initrd not found or empty - disabling initrd Zone PFN ranges: Normal 0x00000000 -> 0x00004000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x00000000 -> 0x00004000 avail: cpu2 is not ready avail: cpu3 is not ready Detected 1 available secondary CPU(s) PERCPU: Embedded 7 pages/cpu @81083000 s6464 r8192 d14016 u65536 pcpu-alloc: s6464 r8192 d14016 u65536 alloc=16*4096 pcpu-alloc: [0] 0 [0] 1 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256 Kernel command line: console=ttyS1,57600n8 root=/dev/ram0 console=ttyS1,57600 root=/dev/ram0 rootfstype=squashfs,jffs2 PID hash table entries: 256 (order: -2, 1024 bytes) Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Writing ErrCtl register=00011c44 Readback ErrCtl register=00011c44 Memory: 51780k/65536k available (4115k kernel code, 13756k reserved, 1484k data, 7220k init, 0k highmem) Hierarchical RCU implementation. Verbose stalled-CPUs detection is disabled. NR_IRQS:128 Trying to install interrupt handler for IRQ24 Trying to install interrupt handler for IRQ25 Trying to install interrupt handler for IRQ22 Trying to install interrupt handler for IRQ9 Trying to install interrupt handler for IRQ10 Trying to install interrupt handler for IRQ11 Trying to install interrupt handler for IRQ12 Trying to install interrupt handler for IRQ13 Trying to install interrupt handler for IRQ14 Trying to install interrupt handler for IRQ16 Trying to install interrupt handler for IRQ17 Trying to install interrupt handler for IRQ18 Trying to install interrupt handler for IRQ19 Trying to install interrupt handler for IRQ20 Trying to install interrupt handler for IRQ21 Trying to install interrupt handler for IRQ23 Trying to install interrupt handler for IRQ26 Trying to install interrupt handler for IRQ27 Trying to install interrupt handler for IRQ28 Trying to install interrupt handler for IRQ15 Trying to install interrupt handler for IRQ8 Trying to install interrupt handler for IRQ29 Trying to install interrupt handler for IRQ30 Trying to install interrupt handler for IRQ31 CPU0: status register was 11000000 CPU0: status register now 11000000 CPU0: status register frc 11001800 console [ttyS1] enabled Calibrating delay loop... 579.58 BogoMIPS (lpj=1159168) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 launch: starting cpu1 launch: cpu1 gone! CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Brought up 2 CPUs Synchronize counters across 2 CPUs: done. NET: Registered protocol family 16 release PCIe RST: RALINK_RSTCTRL = 1000000 PCIE PHY initialize ***** Xtal 40MHz ***** start MT7621 PCIe register access RALINK_RSTCTRL = 1000000 RALINK_CLKCFG1 = 77ffeff8 *************** MT7621 PCIe RC mode ************* pcie_link status = 0x1 RALINK_RSTCTRL= 1000000 *** Configure Device number setting of Virtual PCI-PCI bridge *** RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 PCIE0 enabled interrupt enable status: 100000 Port 0 N_FTS = 1b105000 config reg done init_rt2880pci done bio: create slab <bio-0> at 0 vgaarb: loaded SCSI subsystem initialized pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff] pci 0000:00:00.0: BAR 1: set to [mem 0x60100000-0x6010ffff] (PCI address [0x60100000-0x6010ffff] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff] pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff] (PCI address [0x60000000-0x600fffff] pci 0000:00:00.0: PCI bridge to [bus 01-01] pci 0000:00:00.0: bridge window [io disabled] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] pci 0000:00:00.0: bridge window [mem pref disabled] PCI: Enabling device 0000:00:00.0 (0004 -> 0006) BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60100000 res[1]->end = 6010ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0, irq=0x4 res[0]->start = 60000000 res[0]->end = 600fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 16384 bytes) TCP bind hash table entries: 2048 (order: 2, 16384 bytes) TCP: Hash tables configured (established 2048 bind 2048) TCP reno registered UDP hash table entries: 128 (order: 0, 4096 bytes) UDP-Lite hash table entries: 128 (order: 0, 4096 bytes) NET: Registered protocol family 1 4 CPUs re-calibrate udelay(lpj = 1167360) msgmni has been set to 101 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) io scheduler noop registered (default) Ralink gpio driver initialized spidrv_major = 217 Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A brd: module loaded MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error Allocate 16 byte aligned buffer: 80cb7860 Enable NFI Clock # MTK NAND # : Use HW ECC NAND ID [01 F1 80 1D 01, 00801d01] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 Support this Device in MTK table! 1f1 NAND device: Manufacturer ID: 0x01, Chip ID: 0xf1 (AMD NAND 128MiB 3,3V 8-bit) [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 Scanning device for bad blocks Creating 10 MTD partitions on "MT7621-NAND": 0x000000000000-0x000008000000 : "ALL" 0x000000000000-0x000000100000 : "Bootloader" 0x000000100000-0x000000200000 : "MRD" 0x000000200000-0x000000300000 : "Factory" 0x000000300000-0x000000400000 : "Config" 0x000000400000-0x000002400000 : "Kernel" 0x000002400000-0x000004400000 : "Kernel2" 0x000004400000-0x000004500000 : "Private" 0x000004500000-0x000005500000 : "Log" 0x000005500000-0x000008000000 : "App" [mtk_nand] probe successfully! Signature matched and data read! load_fact_bbt success 1023 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 rdm_major = 253 GMAC1_MAC_ADRH -- : 0x00006031 GMAC1_MAC_ADRL -- : 0x97661610 Ralink APSoC Ethernet Driver Initilization. v3.1 512 rx/tx descriptors allocated, mtu = 1500! GMAC1_MAC_ADRH -- : 0x00006031 GMAC1_MAC_ADRL -- : 0x97661610 PROC INIT OK! register mt_drv === pAd = c0282000, size = 813160 === <-- RTMPAllocTxRxRingMemory, Status=0, ErrorValue=0x <-- RTMPAllocAdapterBlock, Status=0 pAd->CSRBaseAddress =0xc0180000, csr_addr=0xc0180000! device_id =0x7603 RtmpChipOpsHook(507): Not support for HIF_MT yet! mt7603_init()--> mt_bcn_buf_init(224): Not support for HIF_MT yet! <--mt7603_init() nf_conntrack version 0.5.0 (2048 buckets, 8192 max) GRE over IPv4 demultiplexor driver ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Restricted Cone TCP cubic registered NET: Registered protocol family 10 IPv6 over IPv4 tunneling driver NET: Registered protocol family 17 L2TP core driver, V2.0 802.1Q VLAN Support v1.8 Ben Greear <gree...@candelatech.com> All bugs added by David S. Miller <da...@redhat.com> Freeing unused kernel memory: 7220k freed init started: BusAlgorithmics/MIPS FPU Emulator v1.5 yBox v1.12.1 (2016-05-18 18devpts: called with bogus options :16:53 CST) starting pid 33, tty '': '/etc_ro/rcS' mount: mounting none onralink_gpio: irq number(8) pid =38 /ralink_gpio: irq number(1001) pid =38 pralink_gpio: irq number(1001) pid =38 ralink_gpio: irq number(18) pid =37 roc/bus/usb failed: No such file or directory Welcome to _______ _______ ___ __ ____ _ _ ___ | ___ \| __ || | |__|| \ | || | / / | |___| login as: TX_BCN DESC a25ab000 size = 320 RX[0] DESC a25af000 size = 2048 RX[1] DESC a25b2000 size = 2048 E2pAccessMode=2 cfg_mode=9 cfg_mode=9 wmode_band_equal(): Band Equal! APSDCapable[0]=0 APSDCapable[1]=0 APSDCapable[2]=0 APSDCapable[3]=0 APSDCapable[4]=0 APSDCapable[5]=0 APSDCapable[6]=0 APSDCapable[7]=0 APSDCapable[8]=0 APSDCapable[9]=0 APSDCapable[10]=0 APSDCapable[11]=0 APSDCapable[12]=0 APSDCapable[13]=0 APSDCapable[14]=0 APSDCapable[15]=0 FW Version:_mt7603mp FW Build Date:20150624233050 CmdAddressLenReq:(ret = 0) CmdFwStartReq: override = 1, address = 1048576 CmdStartDLRsp: WiFI FW Download Success AsicDMASchedulerInit(): DMA Scheduler Mode=0(LMAC) efuse_probe: efuse = 10000012 RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5 RtmpEepromGetDefault::e2p_dafault=1 RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1 NVM is FLASH mode, flash_offset = 0x40000 1. Phy Mode = 14 Country Region from e2p = ffff tssi_1_target_pwr_g_band = 34 2. Phy Mode = 14 3. Phy Mode = 14 NICInitPwrPinCfg(14): Not support for HIF_MT yet! NICInitializeAsic(584): Not support rtmp_mac_sys_reset () for HIF_MT yet! mt_mac_init()--> mt7603_init_mac_cr()--> AsicSetMacMaxLen(1859): Set the Max RxPktLen=1024! <--mt_mac_init() WTBL Segment 1 info: MemBaseAddr/FID:0x28000/0 EntrySize/Cnt:32/128 WTBL Segment 2 info: MemBaseAddr/FID:0x40000/0 EntrySize/Cnt:64/128 WTBL Segment 3 info: MemBaseAddr/FID:0x42000/64 EntrySize/Cnt:64/128 WTBL Segment 4 info: MemBaseAddr/FID:0x44000/128 EntrySize/Cnt:32/128 MtAsicACQueue: Write CR:21510, Value=10421 MtAsicACQueue: Write CR:21500, Value=10421 AntCfgInit(2538): Not support for HIF_MT yet! RTMPSetPhyMode(): channel out of range, use first ch=0 MCS Set = ff ff 00 00 01 mt7603_switch_channel(): Switch to Ch#1(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#2(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#4(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#5(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#6(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#7(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#8(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#9(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#10(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#11(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#12(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#13(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#1(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#2(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#4(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#5(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#6(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#7(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#8(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l [PMF]ap_pmf_init:: apidx=0, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=1, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=2, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=3, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=4, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=5, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=6, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=7, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 AsicSetRalinkBurstMode(4185): Not support for HIF_MT yet! RTMPSetPiggyBack(921): Not support for HIF_MT yet! mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=1 AsicSetTxPreamble(4172): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicSetPreTbtt(): bss_idx=0, PreTBTT timeout = 0xa0 Main bssid = 62:31:87:66:16:10 <==== rt28xx_init, Status=0 @@@ ed_monitor_init : ===> @@@ ed_monitor_init : <=== WiFi Startup Cost (ra0): 7.180s Raeth v3.1 (Tasklet) free_head_phy is 0xae2000!!! free_tail_phy is 0xae3ff0!!! txd_pool=a0ae4000 phy_txd_pool=00AE4000 ei_local->skb_free start address is 0x83ccd48c. free_txd: a0ae4010, ei_local->cpu_ptr: 00AE4000 POOL HEAD_PTR | DMA_PTR | CPU_PTR ----------------+---------+-------- 0xa0ae4000 0x00AE4000 0x00AE4000 phy_rx_ring0 = 0x00ae6000, rx_ring0 = 0xa0ae6000 phy_rx_ring0 = 0x00aea000, rx_ring0 = 0xa0aea000 change HW-TRAP to 0x17ccf!!!!!!!!!!!!GMAC1_MAC_ADRH -- : 0x00006031 GMAC1_MAC_ADRL -- : 0x97661610 GDMA2_MAC_ADRH -- : 0x0000000c GDMA2_MAC_ADRL -- : 0x432880d3 eth3: ===> VirtualIF_open CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 GDMA2_FWD_CFG = 20710000 VID MAC 5 000000000000 9 000000000000 10 000000000000 11 000000000000 device ra0 entered promiscuous mode device eth2 entered promiscuous mode br0: port 2(eth2) entering learning state br0: port 2(eth2) entering learning state br0: port 1(ra0) entering learning state br0: port 1(ra0) entering learning state br0: port 2(eth2) entering learning state br0: port 1(ra0) entering learning state br0: port 2(eth2) entering learning state br0: port 2(eth2) entering learning state br0: port 1(ra0) entering learning state br0: port 1(ra0) entering learning state set mcastVlan to 0 in ethernet driver ADDRCONF(NETDEV_UP): sit0: link is not ready ADDRCONF(NETDEV_UP): ip6tnl0: link is not ready ADDRCONF(NETDEV_UP): ra1: link is not ready ADDRCONF(NETDEV_UP): ra2: link is not ready ADDRCONF(NETDEV_UP): ra3: link is not ready ADDRCONF(NETDEV_UP): ra4: link is not ready ADDRCONF(NETDEV_UP): ra5: link is not ready ADDRCONF(NETDEV_UP): ra6: link is not ready ADDRCONF(NETDEV_UP): ra7: link is not ready ADDRCONF(NETDEV_UP): eth3: link is not ready switch register base addr to 0xbe110000 write offset 0x8, value 0x9000c eth3: ===> VirtualIF_open device eth3 entered promiscuous mode br0: port 3(eth3) entering learning state br0: port 3(eth3) entering learning state killall rt2860apd 1>/dev/null 2>&1 1>/dev/null 2>&1 br0: port 2(eth2) entering forwarding state br0: port 1(ra0) entering forwarding state dropbear.sh 1>/dev/null 2>&1 ralink_gpio: irq number(999) pid =1241 ralink_gpio: irq number(999) pid =1241 br0: port 3(eth3) entering forwarding state killall -q udpsvd 1>/dev/null 2>&1 udpsvd -Ev 0 69 tftpd& 1>/dev/null 2>&1 ntp.sh 1>/dev/null 2>&1 rm -rf /var/run/wscd.pid.ra0 1>/dev/null 2>&1 iwpriv ra0 set WscConfMode=0 1>/dev/null 2>&1 iwpriv ra0 set WscConfMode=7 1>/dev/null 2>&1 iwpriv ra0 set WscConfStatus=1 1>/dev/null 2>&1 route add -host 239.255.255.250 dev br0 1>/dev/null 2>&1 wscd -m 1 -a 169.254.71.254 -i ra0 -D 1>/dev/null 2>&1 killall -q klogd 1>/dev/null 2>&1 killall -q syslogd 1>/dev/null 2>&1 syslogd -C8 1>/dev/null 2>&1 1>/dev/null 2>&1 klogd 1>/dev/null 2>&1 1>/dev/null 2>&1 killall -q mini_httpd 1>/dev/null 2>&1 mkdir -p /var/web 1>/dev/null 2>&1 cp -r /etc_ro/web/* /var/web 1>/dev/null 2>&1 mini_httpd -p 80 -C /etc_ro/mini_httpd_debug.conf 1>/dev/null 2>&1 wpsState=3 monitorInterface=-1 wpsEnd=0 6: slow blinking Green (2 sec), Amber (0,25 sec) login as: _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel