Arjen de Korte <arjen+open...@de-korte.org> writes: > Citeren Paul Fertser <fercer...@gmail.com>: >> Another is >> that such a patch is mostly a bad substitute for proper hardware design. > > Not really. There may not be a hardware reset line if the flash is > running in x4 data mode.
Imagine there's a bug in the kernel that made it hang for real. Then you're counting on the watchdog (usually SoCs come with one integrated) to cleanly reboot the whole system. If the flash is used in QSPI or whatever other mode that doesn't allow a dedicated reset line then it needs to be powercycled on hardware level to ensure reliable operation, I think. -- Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software! mailto:fercer...@gmail.com _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
