Hi,

please split this into 1 patch for each QCA953x fix
and then a final patch for the ap147 support

        John

On 29/06/2015 17:25, Sven Eckelmann wrote:
> Signed-off-by: Sven Eckelmann <s...@open-mesh.com>
> ---
> I got the chance to test the AP147-010 but got no software/SDK or 
> documentation.
> Still wanted to post my results because the device worked well enough for me.
> I am not sure if it originally comes with a PCIe card (I've used at QCA9880
> based one for my tests).
> 
> Most of the SoC relevant code is based on the QCA955x implementation.
> 
> 
>  target/linux/ar71xx/base-files/etc/diag.sh         |   3 +
>  .../ar71xx/base-files/etc/uci-defaults/01_leds     |   9 ++
>  .../ar71xx/base-files/etc/uci-defaults/02_network  |   7 +
>  target/linux/ar71xx/base-files/lib/ar71xx.sh       |   3 +
>  .../lib/preinit/05_set_preinit_iface_ar71xx        |   1 +
>  .../ar71xx/base-files/lib/upgrade/platform.sh      |   1 +
>  target/linux/ar71xx/config-3.18                    |   1 +
>  .../ar71xx/files/arch/mips/ath79/mach-ap147.c      | 119 ++++++++++++++++
>  target/linux/ar71xx/generic/profiles/atheros.mk    |  11 ++
>  target/linux/ar71xx/image/Makefile                 |   3 +
>  target/linux/ar71xx/mikrotik/config-default        |   1 +
>  target/linux/ar71xx/nand/config-default            |   1 +
>  .../740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch   | 158 
> +++++++++++++++++++++
>  .../741-MIPS-ath79-add-USB-for-QCA953x-SoC.patch   |  56 ++++++++
>  .../742-MIPS-ath79-add-ap147-support.patch         |  42 ++++++
>  15 files changed, 416 insertions(+)
>  create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-ap147.c
>  create mode 100644 
> target/linux/ar71xx/patches-3.18/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch
>  create mode 100644 
> target/linux/ar71xx/patches-3.18/741-MIPS-ath79-add-USB-for-QCA953x-SoC.patch
>  create mode 100644 
> target/linux/ar71xx/patches-3.18/742-MIPS-ath79-add-ap147-support.patch
> 
> diff --git a/target/linux/ar71xx/base-files/etc/diag.sh 
> b/target/linux/ar71xx/base-files/etc/diag.sh
> index 4313f2f..169d192 100644
> --- a/target/linux/ar71xx/base-files/etc/diag.sh
> +++ b/target/linux/ar71xx/base-files/etc/diag.sh
> @@ -22,6 +22,9 @@ get_status_led() {
>       ap136-020)
>               status_led="ap136:green:status"
>               ;;
> +     ap147-010)
> +             status_led="ap147:green:status"
> +             ;;
>       ap135-020)
>               status_led="ap135:green:status"
>               ;;
> diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds 
> b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
> index 3cd17b1..1d4f88d 100644
> --- a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
> +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
> @@ -40,6 +40,15 @@ ap113)
>       ucidef_set_led_usbdev "usb" "USB" "ap113:green:usb" "1-1"
>       ;;
>  
> +ap147-010)
> +     ucidef_set_led_netdev "wan" "WAN" "ap147:green:wan" "eth1"
> +     ucidef_set_led_switch "lan1" "LAN1" "ap147:green:lan1" "switch0" "0x10"
> +     ucidef_set_led_switch "lan2" "LAN2" "ap147:green:lan2" "switch0" "0x08"
> +     ucidef_set_led_switch "lan3" "LAN3" "ap147:green:lan3" "switch0" "0x04"
> +     ucidef_set_led_switch "lan4" "LAN4" "ap147:green:lan4" "switch0" "0x02"
> +     ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "ap147:green:wlan-2g" 
> "phy0tpt"
> +     ;;
> +
>  bullet-m | \
>  nanostation-m | \
>  rocket-m | \
> diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network 
> b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
> index 2fab4c2..1b39d2a 100644
> --- a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
> +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
> @@ -45,6 +45,13 @@ ap136-010)
>       ucidef_add_switch_vlan "switch0" "2" "5 6"
>       ;;
>  
> +ap147-010)
> +     ucidef_set_interfaces_lan_wan "eth0" "eth1"
> +     ucidef_add_switch "switch0" "1" "1"
> +     ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 4"
> +     ucidef_add_switch_vlan "switch0" "2" "5 6"
> +     ;;
> +
>  ap136-020 |\
>  ap135-020 |\
>  tl-wr1043nd-v2 |\
> diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh 
> b/target/linux/ar71xx/base-files/lib/ar71xx.sh
> index 09c06d7..85aeda0 100755
> --- a/target/linux/ar71xx/base-files/lib/ar71xx.sh
> +++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh
> @@ -359,6 +359,9 @@ ar71xx_board_detect() {
>       *"AP135-020 reference board")
>               name="ap135-020"
>               ;;
> +     *"AP147-010 reference board")
> +             name="ap147-010"
> +             ;;
>       *AP81)
>               name="ap81"
>               ;;
> diff --git 
> a/target/linux/ar71xx/base-files/lib/preinit/05_set_preinit_iface_ar71xx 
> b/target/linux/ar71xx/base-files/lib/preinit/05_set_preinit_iface_ar71xx
> index f11ea8c..d214e9b 100644
> --- a/target/linux/ar71xx/base-files/lib/preinit/05_set_preinit_iface_ar71xx
> +++ b/target/linux/ar71xx/base-files/lib/preinit/05_set_preinit_iface_ar71xx
> @@ -12,6 +12,7 @@ set_preinit_iface() {
>       alfa-nx |\
>       ap135-020 |\
>       ap136-020 |\
> +     ap147-010 |\
>       ap83 |\
>       archer-c5 |\
>       archer-c7 |\
> diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh 
> b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
> index 370605d..7b21715 100755
> --- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
> +++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
> @@ -179,6 +179,7 @@ platform_check_image() {
>       ap136-010 | \
>       ap136-020 | \
>       ap135-020 | \
> +     ap147-010 | \
>       ap96 | \
>       bxu2000n-2-a1 | \
>       db120 | \
> diff --git a/target/linux/ar71xx/config-3.18 b/target/linux/ar71xx/config-3.18
> index 7a95f68..7794562 100644
> --- a/target/linux/ar71xx/config-3.18
> +++ b/target/linux/ar71xx/config-3.18
> @@ -35,6 +35,7 @@ CONFIG_ATH79_MACH_AP113=y
>  CONFIG_ATH79_MACH_AP121=y
>  CONFIG_ATH79_MACH_AP132=y
>  CONFIG_ATH79_MACH_AP136=y
> +CONFIG_ATH79_MACH_AP147=y
>  CONFIG_ATH79_MACH_AP81=y
>  CONFIG_ATH79_MACH_AP83=y
>  CONFIG_ATH79_MACH_AP96=y
> diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap147.c 
> b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap147.c
> new file mode 100644
> index 0000000..6e828ae
> --- /dev/null
> +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap147.c
> @@ -0,0 +1,119 @@
> +/*
> + *  Atheros AP147 reference board support
> + *
> + *  Copyright (C) 2014 Matthias Schiffer <mschif...@universe-factory.net>
> + *  Copyright (C) 2015 Sven Eckelmann <s...@open-mesh.com>
> + *
> + *  This program is free software; you can redistribute it and/or modify it
> + *  under the terms of the GNU General Public License version 2 as published
> + *  by the Free Software Foundation.
> + */
> +
> +#include <linux/platform_device.h>
> +#include <linux/ar8216_platform.h>
> +
> +#include <asm/mach-ath79/ar71xx_regs.h>
> +#include <asm/mach-ath79/ath79.h>
> +
> +#include "common.h"
> +#include "dev-ap9x-pci.h"
> +#include "dev-eth.h"
> +#include "dev-gpio-buttons.h"
> +#include "dev-leds-gpio.h"
> +#include "dev-m25p80.h"
> +#include "dev-usb.h"
> +#include "dev-wmac.h"
> +#include "machtypes.h"
> +#include "pci.h"
> +
> +#define AP147_GPIO_LED_WAN   4
> +#define AP147_GPIO_LED_LAN1  16
> +#define AP147_GPIO_LED_LAN2  15
> +#define AP147_GPIO_LED_LAN3  14
> +#define AP147_GPIO_LED_LAN4  11
> +#define AP147_GPIO_LED_STATUS        13
> +#define AP147_GPIO_LED_WLAN_2G       12
> +
> +#define AP147_GPIO_BTN_WPS   17
> +
> +#define AP147_KEYS_POLL_INTERVAL     20      /* msecs */
> +#define AP147_KEYS_DEBOUNCE_INTERVAL (3 * AP147_KEYS_POLL_INTERVAL)
> +
> +#define AP147_MAC0_OFFSET    0x1000
> +
> +static struct gpio_led ap147_leds_gpio[] __initdata = {
> +     {
> +             .name           = "ap147:green:status",
> +             .gpio           = AP147_GPIO_LED_STATUS,
> +             .active_low     = 1,
> +     }, {
> +             .name           = "ap147:green:wlan-2g",
> +             .gpio           = AP147_GPIO_LED_WLAN_2G,
> +             .active_low     = 1,
> +     }, {
> +             .name           = "ap147:green:lan1",
> +             .gpio           = AP147_GPIO_LED_LAN1,
> +             .active_low     = 1,
> +     }, {
> +             .name           = "ap147:green:lan2",
> +             .gpio           = AP147_GPIO_LED_LAN2,
> +             .active_low     = 1,
> +     }, {
> +             .name           = "ap147:green:lan3",
> +             .gpio           = AP147_GPIO_LED_LAN3,
> +             .active_low     = 1,
> +     }, {
> +             .name           = "ap147:green:lan4",
> +             .gpio           = AP147_GPIO_LED_LAN4,
> +             .active_low     = 1,
> +     }, {
> +             .name           = "ap147:green:wan",
> +             .gpio           = AP147_GPIO_LED_WAN,
> +             .active_low     = 1,
> +     },
> +};
> +
> +static struct gpio_keys_button ap147_gpio_keys[] __initdata = {
> +     {
> +             .desc           = "wps button",
> +             .type           = EV_KEY,
> +             .code           = KEY_WPS_BUTTON,
> +             .debounce_interval = AP147_KEYS_DEBOUNCE_INTERVAL,
> +             .gpio           = AP147_GPIO_BTN_WPS,
> +             .active_low     = 1,
> +     }
> +};
> +
> +static void __init ap147_setup(void)
> +{
> +     u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
> +
> +     ath79_register_m25p80(NULL);
> +     ath79_register_leds_gpio(-1, ARRAY_SIZE(ap147_leds_gpio),
> +                              ap147_leds_gpio);
> +     ath79_register_gpio_keys_polled(-1, AP147_KEYS_POLL_INTERVAL,
> +                                     ARRAY_SIZE(ap147_gpio_keys),
> +                                     ap147_gpio_keys);
> +
> +     ath79_register_usb();
> +
> +     ath79_register_pci();
> +
> +     ath79_register_wmac(art + AP147_MAC0_OFFSET, NULL);
> +
> +     ath79_setup_ar933x_phy4_switch(false, false);
> +
> +     ath79_register_mdio(0, 0x0);
> +
> +     /* LAN */
> +     ath79_init_mac(ath79_eth1_data.mac_addr, art, 0);
> +     ath79_register_eth(1);
> +
> +     /* WAN */
> +     ath79_switch_data.phy4_mii_en = 1;
> +     ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
> +     ath79_init_mac(ath79_eth0_data.mac_addr, art, 1);
> +     ath79_register_eth(0);
> +}
> +
> +MIPS_MACHINE(ATH79_MACH_AP147_010, "AP147-010", "Atheros AP147-010 reference 
> board", ap147_setup);
> diff --git a/target/linux/ar71xx/generic/profiles/atheros.mk 
> b/target/linux/ar71xx/generic/profiles/atheros.mk
> index ba12484..f8930cd 100644
> --- a/target/linux/ar71xx/generic/profiles/atheros.mk
> +++ b/target/linux/ar71xx/generic/profiles/atheros.mk
> @@ -71,6 +71,17 @@ endef
>  
>  $(eval $(call Profile,AP136))
>  
> +define Profile/AP147
> +     NAME:=Atheros AP147 reference board
> +     PACKAGES:=kmod-usb-core kmod-usb2 kmod-usb-storage
> +endef
> +
> +define Profile/AP147/Description
> +     Package set optimized for the Atheros AP147 reference board.
> +endef
> +
> +$(eval $(call Profile,AP147))
> +
>  define Profile/AP81
>       NAME:=Atheros AP81 reference board
>       PACKAGES:=kmod-usb-core kmod-usb2
> diff --git a/target/linux/ar71xx/image/Makefile 
> b/target/linux/ar71xx/image/Makefile
> index e3f87b9..6158cd3 100644
> --- a/target/linux/ar71xx/image/Makefile
> +++ b/target/linux/ar71xx/image/Makefile
> @@ -1146,6 +1146,7 @@ 
> ap121_mtdlayout_4M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,2752k(rootfs
>  
> ap132_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),6400k(rootfs),64k(art),7808k@0x50000(firmware)
>  
> ap135_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware)
>  
> ap136_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(mib0),64k(art)ro,7744k@0x50000(firmware)
> +ap147_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art),16000k@0x50000(firmware)
>  
> bxu2000n2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),8448k(rootfs),6016k(user),64k(cfg),64k(oem),64k(art)ro
>  
> cameo_ap81_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,3840k(firmware),64k(art)ro
>  
> cameo_ap91_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3712k(firmware),64k(mac)ro,64k(art)ro
> @@ -1974,6 +1975,7 @@ $(eval $(call 
> SingleProfile,AthLzma,64k,AP132,ap132,AP132,ttyS0,115200,$$(ap132_
>  $(eval $(call 
> SingleProfile,AthLzma,64k,AP135,ap135-020,AP135-020,ttyS0,115200,$$(ap135_mtdlayout),RKuImage))
>  $(eval $(call 
> SingleProfile,AthLzma,64k,AP136_010,ap136-010,AP136-010,ttyS0,115200,$$(ap136_mtdlayout),RKuImage))
>  $(eval $(call 
> SingleProfile,AthLzma,64k,AP136_020,ap136-020,AP136-020,ttyS0,115200,$$(ap136_mtdlayout),RKuImage))
> +$(eval $(call 
> SingleProfile,AthLzma,64k,AP147_010,ap147-010,AP147-010,ttyS0,115200,$$(ap147_mtdlayout),RKuImage))
>  $(eval $(call 
> SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage))
>  $(eval $(call 
> SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
>  $(eval $(call 
> SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
> @@ -2122,6 +2124,7 @@ $(eval $(call 
> SingleProfile,ZyXEL,64k,NBG_460N_550N_550NH,nbg460n_550n_550nh,NBG
>  
>  $(eval $(call MultiProfile,AP121,AP121_2M AP121_4M))
>  $(eval $(call MultiProfile,AP136,AP136_010 AP136_020))
> +$(eval $(call MultiProfile,AP147,AP147_010))
>  $(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT EWDORIN16M))
>  $(eval $(call MultiProfile,OPENMESH,OM2P OM5P OM5PAC MR600 MR900))
>  $(eval $(call MultiProfile,TEW652BRP,TEW652BRP_FW TEW652BRP_RECOVERY))
> diff --git a/target/linux/ar71xx/mikrotik/config-default 
> b/target/linux/ar71xx/mikrotik/config-default
> index b8a7bf1..b92924e 100644
> --- a/target/linux/ar71xx/mikrotik/config-default
> +++ b/target/linux/ar71xx/mikrotik/config-default
> @@ -8,6 +8,7 @@ CONFIG_AT803X_PHY=y
>  # CONFIG_ATH79_MACH_AP121 is not set
>  # CONFIG_ATH79_MACH_AP132 is not set
>  # CONFIG_ATH79_MACH_AP136 is not set
> +# CONFIG_ATH79_MACH_AP147 is not set
>  # CONFIG_ATH79_MACH_AP81 is not set
>  # CONFIG_ATH79_MACH_AP83 is not set
>  # CONFIG_ATH79_MACH_AP96 is not set
> diff --git a/target/linux/ar71xx/nand/config-default 
> b/target/linux/ar71xx/nand/config-default
> index 626d676..50b6dbe 100644
> --- a/target/linux/ar71xx/nand/config-default
> +++ b/target/linux/ar71xx/nand/config-default
> @@ -7,6 +7,7 @@
>  # CONFIG_ATH79_MACH_AP121 is not set
>  # CONFIG_ATH79_MACH_AP132 is not set
>  # CONFIG_ATH79_MACH_AP136 is not set
> +# CONFIG_ATH79_MACH_AP147 is not set
>  # CONFIG_ATH79_MACH_AP81 is not set
>  # CONFIG_ATH79_MACH_AP83 is not set
>  # CONFIG_ATH79_MACH_AP96 is not set
> diff --git 
> a/target/linux/ar71xx/patches-3.18/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch
>  
> b/target/linux/ar71xx/patches-3.18/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch
> new file mode 100644
> index 0000000..f703151
> --- /dev/null
> +++ 
> b/target/linux/ar71xx/patches-3.18/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch
> @@ -0,0 +1,158 @@
> +--- a/arch/mips/ath79/pci.c
> ++++ b/arch/mips/ath79/pci.c
> +@@ -53,6 +53,15 @@ static const struct ath79_pci_irq ar724x
> +     }
> + };
> + 
> ++static const struct ath79_pci_irq qca953x_pci_irq_map[] __initconst = {
> ++    {
> ++            .bus    = 0,
> ++            .slot   = 0,
> ++            .pin    = 1,
> ++            .irq    = ATH79_PCI_IRQ(0),
> ++    },
> ++};
> ++
> + static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = {
> +     {
> +             .bus    = 0,
> +@@ -98,6 +107,9 @@ int __init pcibios_map_irq(const struct
> +                        soc_is_ar9344()) {
> +                     ath79_pci_irq_map = ar724x_pci_irq_map;
> +                     ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
> ++            } else if (soc_is_qca953x()) {
> ++                    ath79_pci_irq_map = qca953x_pci_irq_map;
> ++                    ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map);
> +             } else if (soc_is_qca955x()) {
> +                     ath79_pci_irq_map = qca955x_pci_irq_map;
> +                     ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map);
> +@@ -303,6 +315,15 @@ int __init ath79_register_pci(void)
> +                                              AR724X_PCI_MEM_SIZE,
> +                                              0,
> +                                              ATH79_IP2_IRQ(0));
> ++    } else if (soc_is_qca9533()) {
> ++            pdev = ath79_register_pci_ar724x(0,
> ++                                             QCA953X_PCI_CFG_BASE0,
> ++                                             QCA953X_PCI_CTRL_BASE0,
> ++                                             QCA953X_PCI_CRP_BASE0,
> ++                                             QCA953X_PCI_MEM_BASE0,
> ++                                             QCA953X_PCI_MEM_SIZE,
> ++                                             0,
> ++                                             ATH79_IP2_IRQ(0));
> +     } else if (soc_is_qca9558()) {
> +             pdev = ath79_register_pci_ar724x(0,
> +                                              QCA955X_PCI_CFG_BASE0,
> +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> +@@ -105,6 +105,15 @@
> + #define AR934X_SRIF_BASE    (AR71XX_APB_BASE + 0x00116000)
> + #define AR934X_SRIF_SIZE    0x1000
> + 
> ++#define QCA953X_PCI_MEM_BASE0       0x10000000
> ++#define QCA953X_PCI_MEM_SIZE        0x02000000
> ++#define QCA953X_PCI_CFG_BASE0       0x14000000
> ++#define QCA953X_PCI_CFG_SIZE        0x1000
> ++#define QCA953X_PCI_CRP_BASE0       (AR71XX_APB_BASE + 0x000c0000)
> ++#define QCA953X_PCI_CRP_SIZE        0x1000
> ++#define QCA953X_PCI_CTRL_BASE0      (AR71XX_APB_BASE + 0x000f0000)
> ++#define QCA953X_PCI_CTRL_SIZE       0x100
> ++
> + #define QCA953X_WMAC_BASE   (AR71XX_APB_BASE + 0x00100000)
> + #define QCA953X_WMAC_SIZE   0x20000
> + 
> +@@ -636,6 +645,25 @@
> +      AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \
> +      AR934X_PCIE_WMAC_INT_PCIE_RC3)
> + 
> ++#define QCA953X_EXT_INT_WMAC_MISC           BIT(0)
> ++#define QCA953X_EXT_INT_WMAC_TX                     BIT(1)
> ++#define QCA953X_EXT_INT_WMAC_RXLP           BIT(2)
> ++#define QCA953X_EXT_INT_WMAC_RXHP           BIT(3)
> ++#define QCA953X_EXT_INT_PCIE_RC1            BIT(4)
> ++#define QCA953X_EXT_INT_PCIE_RC1_INT0               BIT(5)
> ++#define QCA953X_EXT_INT_PCIE_RC1_INT1               BIT(6)
> ++#define QCA953X_EXT_INT_PCIE_RC1_INT2               BIT(7)
> ++#define QCA953X_EXT_INT_PCIE_RC1_INT3               BIT(8)
> ++
> ++#define QCA953X_EXT_INT_WMAC_ALL \
> ++    (QCA953X_EXT_INT_WMAC_MISC | QCA953X_EXT_INT_WMAC_TX | \
> ++     QCA953X_EXT_INT_WMAC_RXLP | QCA953X_EXT_INT_WMAC_RXHP)
> ++
> ++#define QCA953X_EXT_INT_PCIE_RC1_ALL \
> ++    (QCA953X_EXT_INT_PCIE_RC1 | QCA953X_EXT_INT_PCIE_RC1_INT0 | \
> ++     QCA953X_EXT_INT_PCIE_RC1_INT1 | QCA953X_EXT_INT_PCIE_RC1_INT2 | \
> ++     QCA953X_EXT_INT_PCIE_RC1_INT3)
> ++
> + #define QCA955X_EXT_INT_WMAC_MISC           BIT(0)
> + #define QCA955X_EXT_INT_WMAC_TX                     BIT(1)
> + #define QCA955X_EXT_INT_WMAC_RXLP           BIT(2)
> +--- a/arch/mips/ath79/irq.c
> ++++ b/arch/mips/ath79/irq.c
> +@@ -156,6 +156,45 @@ static void ar934x_ip2_irq_init(void)
> +     irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
> + }
> + 
> ++static void qca953x_ip2_irq_dispatch(unsigned int irq, struct irq_desc 
> *desc)
> ++{
> ++    u32 status;
> ++
> ++    disable_irq_nosync(irq);
> ++
> ++    status = ath79_reset_rr(QCA953X_RESET_REG_EXT_INT_STATUS);
> ++    status &= QCA953X_EXT_INT_PCIE_RC1_ALL | QCA953X_EXT_INT_WMAC_ALL;
> ++
> ++    if (status == 0) {
> ++            spurious_interrupt();
> ++            goto enable;
> ++    }
> ++
> ++    if (status & QCA953X_EXT_INT_PCIE_RC1_ALL) {
> ++            /* TODO: flush DDR? */
> ++            generic_handle_irq(ATH79_IP2_IRQ(0));
> ++    }
> ++
> ++    if (status & QCA953X_EXT_INT_WMAC_ALL) {
> ++            /* TODO: flush DDR? */
> ++            generic_handle_irq(ATH79_IP2_IRQ(1));
> ++    }
> ++
> ++enable:
> ++    enable_irq(irq);
> ++}
> ++
> ++static void qca953x_irq_init(void)
> ++{
> ++    int i;
> ++
> ++    for (i = ATH79_IP2_IRQ_BASE;
> ++         i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
> ++            irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
> ++
> ++    irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch);
> ++}
> ++
> + static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc 
> *desc)
> + {
> +     u32 status;
> +@@ -490,6 +529,8 @@ void __init arch_init_irq(void)
> + 
> +     if (soc_is_ar934x())
> +             ar934x_ip2_irq_init();
> ++    else if ( soc_is_qca953x())
> ++            qca953x_irq_init();
> +     else if (soc_is_qca955x())
> +             qca955x_irq_init();
> +     else if (soc_is_qca956x())
> +--- a/arch/mips/ath79/dev-wmac.c
> ++++ b/arch/mips/ath79/dev-wmac.c
> +@@ -159,8 +159,8 @@ static void qca953x_wmac_setup(void)
> + 
> +     ath79_wmac_resources[0].start = QCA953X_WMAC_BASE;
> +     ath79_wmac_resources[0].end = QCA953X_WMAC_BASE + QCA953X_WMAC_SIZE - 1;
> +-    ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2);
> +-    ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2);
> ++    ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
> ++    ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1);
> + 
> +     t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP);
> +     if (t & QCA953X_BOOTSTRAP_REF_CLK_40)
> diff --git 
> a/target/linux/ar71xx/patches-3.18/741-MIPS-ath79-add-USB-for-QCA953x-SoC.patch
>  
> b/target/linux/ar71xx/patches-3.18/741-MIPS-ath79-add-USB-for-QCA953x-SoC.patch
> new file mode 100644
> index 0000000..12a5e04
> --- /dev/null
> +++ 
> b/target/linux/ar71xx/patches-3.18/741-MIPS-ath79-add-USB-for-QCA953x-SoC.patch
> @@ -0,0 +1,56 @@
> +--- a/arch/mips/ath79/dev-usb.c
> ++++ b/arch/mips/ath79/dev-usb.c
> +@@ -236,6 +236,33 @@ static void __init ar934x_usb_setup(void
> +                        &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
> + }
> + 
> ++static void qca953x_usb_reset_notifier(struct platform_device *pdev)
> ++{
> ++    u32 base;
> ++
> ++    switch (pdev->id) {
> ++    case 0:
> ++            base = 0x18116c94;
> ++            break;
> ++
> ++    default:
> ++            return;
> ++    }
> ++
> ++    enable_tx_tx_idp_violation_fix(base);
> ++    dev_info(&pdev->dev, "TX-TX IDP fix enabled\n");
> ++}
> ++
> ++static void __init qca953x_usb_setup(void)
> ++{
> ++    ath79_ehci_pdata_v2.reset_notifier = qca953x_usb_reset_notifier;
> ++
> ++    ath79_usb_register("ehci-platform", 0,
> ++                       QCA953X_EHCI0_BASE, QCA953X_EHCI_SIZE,
> ++                       ATH79_CPU_IRQ(3),
> ++                       &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
> ++}
> ++
> + static void qca955x_usb_reset_notifier(struct platform_device *pdev)
> + {
> +     u32 base;
> +@@ -299,6 +326,8 @@ void __init ath79_register_usb(void)
> +             ar933x_usb_setup();
> +     else if (soc_is_ar934x())
> +             ar934x_usb_setup();
> ++    else if (soc_is_qca953x())
> ++            qca953x_usb_setup();
> +     else if (soc_is_qca955x())
> +             qca955x_usb_setup();
> +     else if (soc_is_qca9561())
> +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> +@@ -116,6 +116,8 @@
> + 
> + #define QCA953X_WMAC_BASE   (AR71XX_APB_BASE + 0x00100000)
> + #define QCA953X_WMAC_SIZE   0x20000
> ++#define QCA953X_EHCI0_BASE  0x1b000000
> ++#define QCA953X_EHCI_SIZE   0x200
> + 
> + #define QCA955X_PCI_MEM_BASE0       0x10000000
> + #define QCA955X_PCI_MEM_BASE1       0x12000000
> diff --git 
> a/target/linux/ar71xx/patches-3.18/742-MIPS-ath79-add-ap147-support.patch 
> b/target/linux/ar71xx/patches-3.18/742-MIPS-ath79-add-ap147-support.patch
> new file mode 100644
> index 0000000..7edd699
> --- /dev/null
> +++ b/target/linux/ar71xx/patches-3.18/742-MIPS-ath79-add-ap147-support.patch
> @@ -0,0 +1,42 @@
> +--- a/arch/mips/ath79/Kconfig
> ++++ b/arch/mips/ath79/Kconfig
> +@@ -104,6 +104,19 @@ config ATH79_MACH_AP136
> +       Say 'Y' here if you want your kernel to support the
> +       Atheros AP136 or AP135 reference boards.
> + 
> ++config ATH79_MACH_AP147
> ++    bool "Atheros AP147 reference board"
> ++    select SOC_QCA953X
> ++    select ATH79_DEV_GPIO_BUTTONS
> ++    select ATH79_DEV_LEDS_GPIO
> ++    select ATH79_DEV_M25P80
> ++    select ATH79_DEV_USB
> ++    select ATH79_DEV_WMAC
> ++    select ATH79_DEV_AP9X_PCI if PCI
> ++    help
> ++      Say 'Y' here if you want your kernel to support the
> ++      QCA AP147 reference boards.
> ++
> + config ATH79_MACH_AP81
> +     bool "Atheros AP81 reference board"
> +     select SOC_AR913X
> +--- a/arch/mips/ath79/Makefile
> ++++ b/arch/mips/ath79/Makefile
> +@@ -46,6 +46,7 @@ obj-$(CONFIG_ATH79_MACH_AP113)             += mach-
> + obj-$(CONFIG_ATH79_MACH_AP121)              += mach-ap121.o
> + obj-$(CONFIG_ATH79_MACH_AP132)              += mach-ap132.o
> + obj-$(CONFIG_ATH79_MACH_AP136)              += mach-ap136.o
> ++obj-$(CONFIG_ATH79_MACH_AP147)              += mach-ap147.o
> + obj-$(CONFIG_ATH79_MACH_AP81)               += mach-ap81.o
> + obj-$(CONFIG_ATH79_MACH_AP83)               += mach-ap83.o
> + obj-$(CONFIG_ATH79_MACH_AP96)               += mach-ap96.o
> +--- a/arch/mips/ath79/machtypes.h
> ++++ b/arch/mips/ath79/machtypes.h
> +@@ -28,6 +28,7 @@ enum ath79_mach_type {
> +     ATH79_MACH_AP135_020,           /* Atheros AP135-020 reference board */
> +     ATH79_MACH_AP136_010,           /* Atheros AP136-010 reference board */
> +     ATH79_MACH_AP136_020,           /* Atheros AP136-020 reference board */
> ++    ATH79_MACH_AP147_010,           /* Atheros AP147-010 reference board */
> +     ATH79_MACH_AP81,                /* Atheros AP81 reference board */
> +     ATH79_MACH_AP83,                /* Atheros AP83 */
> +     ATH79_MACH_AP96,                /* Atheros AP96 */
> 
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