Hi,

Le 02/02/2014 12:01, dani a écrit :
Decrease the SPI FIFO size in BMC6348 boards to avoid random reads/writes.

The parameter BCM63XX_SPI_MAX_PREPEND is causing the SPI driver exceeds the 
hardware capabilities when reading transfer lengths over 58 bytes. Decreasing 
the SPI fifo size exactly  the BCM63XX_SPI_MAX_PREPEND lenght solves the 
problem.

I noticed it when I connected an external SPI flash memory to my old livebox1, the 
flash memory was correctly recognized as another mtd device with its partition, 
and everything seemed to be going well. When using dd, with block sizes <=58 
all reads went fine, but over 58 all the reads were totally random. I know the SPI 
driver is far from being perfect, but I think It's a good idea to fix this if 
someone decides to use the BCM6348 SPI interface in his board.

With this patch the random reads never happens, when you exceed the limit it 
returns the error
unable to do transfers larger than FIFO size (%i > %i)
As done before the patch. It seems the driver still needs further work.

The patch looks correct on the principle, but I would do that in the spi driver directly for two reasons:

- you would not need to duplicate the prepend count value in dev-spi.c
- you would make this work for 6358 and 6368 as well



Signed-off-by: Daniel Gonzalez <dgcb...@gmail.com>

Index: 
target/linux/brcm63xx/patches-3.10/351-bcm6348-decrease_fifo_size_to_fix_random_reads.patch
===================================================================
--- 
target/linux/brcm63xx/patches-3.10/351-bcm6348-decrease_fifo_size_to_fix_random_reads.patch
 (revision 0)
+++ 
target/linux/brcm63xx/patches-3.10/351-bcm6348-decrease_fifo_size_to_fix_random_reads.patch
 (working copy)
@@ -0,0 +1,20 @@
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -18,6 +18,8 @@
+ #include <bcm63xx_dev_spi.h>
+ #include <bcm63xx_regs.h>
+
++#define BCM63XX_SPI_MAX_PREPEND               15
++
+ /*
+  * register offsets
+  */
+@@ -79,7 +81,7 @@
+
+       if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
+               spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1;
+-              spi_pdata.fifo_size = SPI_6348_MSG_DATA_SIZE;
++              spi_pdata.fifo_size = SPI_6348_MSG_DATA_SIZE - 
BCM63XX_SPI_MAX_PREPEND;
+               spi_pdata.msg_type_shift = SPI_6348_MSG_TYPE_SHIFT;
+               spi_pdata.msg_ctl_width = SPI_6348_MSG_CTL_WIDTH;
+       }
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