Backport and fix upstream commit 12d6d41276def096cb3f7dc36f438db9ed6a0a8d for
scx200_hrt to avoid warnings like below on Soekris net48xx boards.
[ 13.310053] ------------[ cut here ]------------
[ 13.310053] WARNING: at kernel/time/timekeeping.c:863 do_timer+0x6bc/0x880()
[ 13.310053] Adjusting scx200_hrt more then 11% (-100663424 vs 360710144)
[ 13.310053] Modules linked in:
[ 13.310053] Pid: 617, comm: dd Tainted: G W 3.3.8 #9
[ 13.310053] Call Trace:
[ 13.310053] [<c1022137>] ? warn_slowpath_common+0x87/0xb0
[ 13.310053] [<c10411cc>] ? do_timer+0x6bc/0x880
[ 13.310053] [<c10221f3>] ? warn_slowpath_fmt+0x33/0x40
[ 13.310053] [<c10411cc>] ? do_timer+0x6bc/0x880
[ 13.310053] [<c1046eaa>] ? tick_do_update_jiffies64+0xba/0x100
[ 13.310053] [<c104700d>] ? tick_sched_timer+0x4d/0xb0
[ 13.310053] [<c103915b>] ? __remove_hrtimer+0x2b/0xa0
[ 13.310053] [<c103934a>] ? __run_hrtimer.isra.35+0x3a/0xb0
[ 13.310053] [<c1039b5d>] ? hrtimer_interrupt+0xdd/0x1f0
[ 13.310053] [<c1004160>] ? timer_interrupt+0x10/0x20
[ 13.310053] [<c1050801>] ? handle_irq_event_percpu+0x21/0x120
[ 13.310053] [<c1052490>] ? cond_unmask_irq+0x40/0x40
[ 13.310053] [<c1050919>] ? handle_irq_event+0x19/0x30
[ 13.310053] [<c10524f6>] ? handle_level_irq+0x66/0x70
[ 13.310053] <IRQ> [<c1003bca>] ? do_IRQ+0x3a/0xb0
[ 13.310053] [<c131d6e9>] ? common_interrupt+0x29/0x30
[ 13.310053] ---[ end trace ac85af0b4252a378 ]---
Signed-off-by: Bruno Randolf <b...@einfach.org>
---
.../004-clocksrouce-scx200_hrt-fix.patch | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644
target/linux/x86/patches-3.3/004-clocksrouce-scx200_hrt-fix.patch
diff --git a/target/linux/x86/patches-3.3/004-clocksrouce-scx200_hrt-fix.patch
b/target/linux/x86/patches-3.3/004-clocksrouce-scx200_hrt-fix.patch
new file mode 100644
index 0000000..b771246
--- /dev/null
+++ b/target/linux/x86/patches-3.3/004-clocksrouce-scx200_hrt-fix.patch
@@ -0,0 +1,45 @@
+--- a/drivers/clocksource/scx200_hrt.c
++++ b/drivers/clocksource/scx200_hrt.c
+@@ -49,9 +49,6 @@ static cycle_t read_hrt(struct clocksour
+ return (cycle_t) inl(scx200_cb_base + SCx200_TIMER_OFFSET);
+ }
+
+-#define HRT_SHIFT_1 22
+-#define HRT_SHIFT_27 26
+-
+ static struct clocksource cs_hrt = {
+ .name = "scx200_hrt",
+ .rating = 250,
+@@ -63,6 +60,7 @@ static struct clocksource cs_hrt = {
+
+ static int __init init_hrt_clocksource(void)
+ {
++ u32 freq;
+ /* Make sure scx200 has initialized the configuration block */
+ if (!scx200_cb_present())
+ return -ENODEV;
+@@ -79,19 +77,14 @@ static int __init init_hrt_clocksource(v
+ outb(HR_TMEN | (mhz27 ? HR_TMCLKSEL : 0),
+ scx200_cb_base + SCx200_TMCNFG_OFFSET);
+
+- if (mhz27) {
+- cs_hrt.shift = HRT_SHIFT_27;
+- cs_hrt.mult = clocksource_hz2mult((HRT_FREQ + ppm) * 27,
+- cs_hrt.shift);
+- } else {
+- cs_hrt.shift = HRT_SHIFT_1;
+- cs_hrt.mult = clocksource_hz2mult(HRT_FREQ + ppm,
+- cs_hrt.shift);
+- }
++ freq = (HRT_FREQ + ppm);
++ if (mhz27)
++ freq *= 27;
++
+ printk(KERN_INFO "enabling scx200 high-res timer (%s MHz +%d ppm)\n",
+ mhz27 ? "27":"1", ppm);
+
+- return clocksource_register(&cs_hrt);
++ return clocksource_register_hz(&cs_hrt, freq);
+ }
+
+ module_init(init_hrt_clocksource);
--
1.8.1.2
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