2013/5/3, John Crispin <j...@phrozen.org>: > On 03/05/13 16:56, Felix Fietkau wrote: >> On 2013-05-03 4:17 PM, José Vázquez Fernández wrote: >>> As have been done previously in the ramips target the Lantiq target >>> could be divided in subtargets based in the SoC (ase, danube, svip, ar9, >>> vr9, ...). >>> The benefits will be the same as in ramips: better organization based in >>> SoC instead of board, and the specific optimizations for each mips core >>> might be easily managed, like dsp extensions, multithreading and some >>> others. >>> The idea is split the subtargets in this way: >>> - XWAY Danube. >>> - XWAY AR9. >>> - XWAY VR9. >>> - ASE or XWAY ASE. >>> - Falcon. >>> - SVIP-le. >>> - SVIP-be. >> Simply making a somewhat arbitrary split of SoC types into subtargets >> the way you're describing is a bad idea - it wastes lots of extra CPU >> cycles for building all images. In the Lantiq target fortunately only compiles for the target board; the problem comes building the snapshots. >> You're not giving any proper justification for your proposed subtarget >> split (which is overkill anyway). >> >> - Felix > > i agree with felix, we used to have per soc subtargets and dropped them > as there is no point in splitting things. > > ase needs a seperate subtarget as it has no pci, falcon / svip need > their own subtarget, as they are are SoC variants of their own with > different pinctrl and so forth. > > however for xway i see no reason to split up the support to a soc based > approach. > > John With the split of the subtargets the optimizations for each SoC can be implemented easily, because the 34Kc cores have support for multithreading afaik, and for the danube based boards some kernel drivers can be disabled in order to make the kernel smaller. To summarize, the benefits are that optimizations for the different cpus can be easily implemented, but the side effect is that the compiling time will be higher.
As Felix said, maybe the best choice, in order to "keep it simple", will be tune all the boards to 34kc and enable the dsp extensions if they improve the overall performance of this processors . Benchmarking the danube 1.3 with dsp ase enabled and tuning to mips 24kec helps slightly, but would be very interesting to see the ar9 and vr9 performance increase. Attached there is a some kind of diff that shows the possible reorganization of the lantiq target. Regards: José
lantiq_subtargets.diff.tar.bz2
Description: BZip2 compressed data
bench.txt.tar.bz2
Description: BZip2 compressed data
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