On Apr 5, 2013, at 8:47 AM, Florian Fainelli wrote:
> I would be grateful if you could also test with vanilla GCC 4.6, 4.7 and 4.8
> and 4.7-linaro whether we need the GCC patch you provided?
We need something for each, but the file I'm patching doesn't exist in some
other versions. I'm going to try to get a patch that works against all those
flavors. The MIPS SDE config (gcc/config/mips/sde.h) already encountered the
mixed .init problem and patched a different way. I think I'm going to steal it
and put it in config/mips/linux.h.
===
/* Force all .init and .fini entries to be 32-bit, not mips16, so that
in a mixed environment they are all the same mode. The crti.asm and
crtn.asm files will also be compiled as 32-bit due to the
-no-mips16 flag in SUBTARGET_ASM_SPEC above. */
#undef CRT_CALL_STATIC_FUNCTION
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
===
And they implemented the "nobody does .S files in mips16 mode" in the compiler
driver rather than in TARGET_ASFLAGS.
===
[...] Force -no-mips16,
so that MIPS16 assembler code requires an explicit ".set mips16".
Very little hand-written MIPS16 assembler exists, and some build
systems expect code to be assembled as non-MIPS16 even if the
prevailing compiler flags select -mips16. */
#undef SUBTARGET_ASM_SPEC
#define SUBTARGET_ASM_SPEC "\
%{!mips1:--trap} \
%{mips16:-no-mips16}"
===
I am inclined to believe SDE when they talk about what is and is not common on
MIPS. I'll take the mips16 part of that #define. Then we can (but don't have
to) revert the openwrt TARGET_ASFLAGS fix.
By the way the problem a GCC patch is fixing is:
00400e18 <_init>:
400e18: 3c1c0002 lui gp,0x2
400e1c: 279ca648 addiu gp,gp,-22968
400e20: 0399e021 addu gp,gp,t9
400e24: 27bdffe0 addiu sp,sp,-32
400e28: afbc0010 sw gp,16(sp)
400e2c: afbf001c sw ra,28(sp)
400e30: afbc0018 sw gp,24(sp)
**400e34: 04171a00 0x4171a00
**400e38: 1a006500 blez s0,41a23c <_end+0x6c7c>
**400e3c: 65000b44 0x65000b44
400e40: 8fbf001c lw ra,28(sp)
400e44: 03e00008 jr ra
400e48: 27bd0020 addiu sp,sp,32
If you disassemble that in mips16 mode, those three words are:
400e34: 1a00 0417 jal 40105c <frame_dummy>
400e38: 6500 nop
400e3a: 1a00 0b44 jal 402d10 <__do_global_ctors_aux>
400e3e: 6500 nop
Jay
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