This adds kernel support for the Exegin Q5x family of boards.
Signed-off-by: Owen Kirby <o...@exegin.com>
Index: target/linux/generic/patches-3.3/980-arm_openwrt_machtypes.patch
===================================================================
--- target/linux/generic/patches-3.3/980-arm_openwrt_machtypes.patch
(revision 35893)
+++ target/linux/generic/patches-3.3/980-arm_openwrt_machtypes.patch
(working copy)
@@ -1,6 +1,6 @@
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
-@@ -1169,3 +1169,31 @@ elite_ulk MACH_ELITE_ULK
ELITE_ULK 38
+@@ -1169,3 +1169,32 @@ elite_ulk MACH_ELITE_ULK
ELITE_ULK 38
pov2 MACH_POV2 POV2 3889
ipod_touch_2g MACH_IPOD_TOUCH_2G IPOD_TOUCH_2G 3890
da850_pqab MACH_DA850_PQAB DA850_PQAB 3891
@@ -30,5 +30,6 @@
+bcm2708 MACH_BCM2708 BCM2708
3138
+wn802t MACH_WN802T WN802T
3306
+nsa310 MACH_NSA310 NSA310
4022
++q5xr5 MACH_Q5XR5 Q5XR5 4275
+wnr3500 MACH_WNR3500 WNR3500
4407
+ap42x MACH_AP42X AP42X 4418
Index: target/linux/at91/patches/902-atmel-serial-rx-control-signals.patch
===================================================================
--- target/linux/at91/patches/902-atmel-serial-rx-control-signals.patch
(revision 0)
+++ target/linux/at91/patches/902-atmel-serial-rx-control-signals.patch
(revision 0)
@@ -0,0 +1,20 @@
+--- a/drivers/tty/serial/atmel_serial.c 2013-03-04 15:43:54.272252347
-0800
++++ b/drivers/tty/serial/atmel_serial.c 2013-03-04 15:42:16.308250877
-0800
+@@ -389,6 +389,8 @@
+ {
+ UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
+
++ UART_PUT_CR(port, ATMEL_US_RXEN);
++
+ if (atmel_use_dma_rx(port)) {
+ /* enable PDC controller */
+ UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
+@@ -404,6 +406,8 @@
+ */
+ static void atmel_stop_rx(struct uart_port *port)
+ {
++ UART_PUT_CR(port, ATMEL_US_RXDIS);
++
+ if (atmel_use_dma_rx(port)) {
+ /* disable PDC receive */
+ UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
Index: target/linux/at91/patches/701-q5xr5-support.patch
===================================================================
--- target/linux/at91/patches/701-q5xr5-support.patch (revision 0)
+++ target/linux/at91/patches/701-q5xr5-support.patch (revision 0)
@@ -0,0 +1,32 @@
+diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
+index 45db05d..b92d5c3 100644
+--- a/arch/arm/mach-at91/Kconfig
++++ b/arch/arm/mach-at91/Kconfig
+@@ -411,6 +411,14 @@ config MACH_USB_A9G20
+ Select this if you are using a Calao Systems USB-A9G20.
+ <http://www.calao-systems.com>
+
++config MACH_Q5XR5
++ bool "Exegin Q5x (rev5)"
++ depends on ARCH_AT91SAM9G20
++ help
++ Enables support for the Exegin Q5x (rev5) board produced by Exegin
++ Technologies Limited.
++ <http://www.exegin.com>
++
+ endif
+
+ if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
+diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
+index 8512e53..7f21797 100644
+--- a/arch/arm/mach-at91/Makefile
++++ b/arch/arm/mach-at91/Makefile
+@@ -71,6 +71,7 @@ obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
+ obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o
board-stamp9g20.o
+ obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
+ obj-$(CONFIG_MACH_USB_A9G20) += board-usb-a926x.o
++obj-$(CONFIG_MACH_Q5XR5) += board-q5xr5.o
+
+ # AT91SAM9260/AT91SAM9G20 board-specific support
+ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
+
Index: target/linux/at91/files/arch/arm/mach-at91/board-q5xr5.c
===================================================================
--- target/linux/at91/files/arch/arm/mach-at91/board-q5xr5.c (revision 0)
+++ target/linux/at91/files/arch/arm/mach-at91/board-q5xr5.c (revision 0)
@@ -0,0 +1,332 @@
+/*
+ * Copyright (C) 2005 SAN People
+ * Copyright (C) 2008 Atmel
+ * Copyright (C) 2012 Exegin Technologies Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/mtd/physmap.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/clk.h>
+#include <linux/uio_driver.h>
+
+#include <mach/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/board.h>
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+static void __init q5x_init_early(void)
+{
+ /* Initialize processor: 18.432 MHz crystal */
+ at91_initialize(18432000);
+
+ /* DBGU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART0 on ttyS1. (Rx, Tx, RTS) */
+ at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_RTS);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+}
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata q5x_udc_data = {
+ .vbus_pin = -EINVAL,
+ .pullup_pin = -EINVAL,
+};
+
+/*
+ * SPI devices.
+ */
+static struct mtd_partition q5x_spiflash_partitions[] = {
+ {
+ .name = "at91boot",
+ .offset = 0,
+ .size = SZ_16K,
+ },
+ {
+ .name = "uboot-env",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = SZ_16K,
+ },
+ {
+ .name = "uboot",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+static struct flash_platform_data q5x_spiflash_data = {
+ .name = "spi_flash",
+ .parts = q5x_spiflash_partitions,
+ .nr_parts = ARRAY_SIZE(q5x_spiflash_partitions),
+};
+
+static struct spi_board_info q5x_spi_devices[] = {
+ { /* DataFlash (bootloader) */
+ .modalias = "m25p80",
+ .bus_num = 0,
+ .chip_select = 0,
+ .max_speed_hz = 15 * 1000 * 1000,
+ .platform_data = &q5x_spiflash_data
+ },
+ { /* AT86RF2xx */
+ .modalias = "spidev",
+ .bus_num = 0,
+ .chip_select = 1,
+ .max_speed_hz = 2 * 1000 * 1000,
+ },
+ { /* AT86RF2xx */
+ .modalias = "spidev",
+ .bus_num = 1,
+ .chip_select = 0,
+ .max_speed_hz = 2 * 1000 * 1000,
+ },
+};
+
+/* UIO for userspace IRQ handling. */
+static struct uio_info spidev0_cs1_platform_data = {
+ .name = "spidev0.1:irq", /* spidev on bus 0, chipselect 1 */
+ .version = "0",
+ .irq = AT91SAM9260_ID_IRQ0,
+ .irq_flags = IRQF_TRIGGER_RISING,
+};
+static struct platform_device spidev0_cs1_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 0,
+ .dev = {.platform_data = &spidev0_cs1_platform_data, },
+};
+static struct uio_info spidev1_cs0_platform_data = {
+ .name = "spidev1.0:irq", /* spidev on bus 0, chipselect 1 */
+ .version = "0",
+ .irq = AT91SAM9260_ID_IRQ1,
+ .irq_flags = IRQF_TRIGGER_RISING,
+};
+static struct platform_device spidev1_cs0_device = {
+ .name = "uio_pdrv_genirq",
+ .id = 1,
+ .dev = {.platform_data = &spidev1_cs0_platform_data,},
+};
+static struct platform_device *spidev_uio_devices[] __initdata = {
+ &spidev0_cs1_device,
+ &spidev1_cs0_device,
+};
+
+static void __init q5x_add_device_spi(void)
+{
+ /* Put the SLPTR pins into an inactive state. */
+ at91_set_gpio_output(AT91_PIN_PC7, 0); /* spidev0.1:slptr */
+ at91_set_gpio_output(AT91_PIN_PC9, 0); /* spidev1.0:slptr */
+
+ /* Configure the SPI devices for userspace access. */
+ at91_add_device_spi(q5x_spi_devices, ARRAY_SIZE(q5x_spi_devices));
+
+ /* Configure the IRQ lines for userspace access. */
+ at91_set_A_periph(AT91_PIN_PC12, 0); /* External IRQ0, no pullup */
+ at91_set_B_periph(AT91_PIN_PC15, 0); /* External IRQ1, no pullup */
+ platform_add_devices(spidev_uio_devices,
ARRAY_SIZE(spidev_uio_devices));
+}
+
+/*
+ * MACB Ethernet device
+ */
+static struct macb_platform_data __initdata q5x_macb_data = {
+ .phy_irq_pin = -EINVAL,
+ .is_rmii = 0,
+};
+
+static void __init q5x_add_device_macb(void)
+{
+ at91_add_device_eth(&q5x_macb_data);
+}
+
+/*
+ * NOR flash
+ */
+static struct physmap_flash_data q5x_norflash_data = {
+ .width = 2,
+};
+static struct resource q5x_norflash_resource = {
+ .start = AT91_CHIPSELECT_0,
+ .end = AT91_CHIPSELECT_0 + SZ_8M - 1,
+ .flags = IORESOURCE_MEM,
+};
+static struct platform_device q5x_norflash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {.platform_data = &q5x_norflash_data},
+ .resource = &q5x_norflash_resource,
+ .num_resources = 1,
+};
+
+static struct sam9_smc_config __initdata q5x_norflash_smc_config = {
+ .ncs_read_setup = 2,
+ .nrd_setup = 2,
+ .ncs_write_setup = 3,
+ .nwe_setup = 3,
+
+ .ncs_read_pulse = 13,
+ .nrd_pulse = 13,
+ .ncs_write_pulse = 14,
+ .nwe_pulse = 12,
+
+ .read_cycle = 17,
+ .write_cycle = 22,
+
+ .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
+ | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_16
+ | AT91_SMC_BAT_SELECT,
+ .tdf_cycles = 3,
+};
+
+static void __init q5x_add_device_nor(void)
+{
+ /* configure chip-select 0 (NOR) */
+ sam9_smc_configure(0, 0, &q5x_norflash_smc_config);
+ /* Add NOR flash partitioning. */
+ platform_device_register(&q5x_norflash);
+}
+
+/*
+ * MCI (SD/MMC)
+ * wp_pin and vcc_pin are not connected
+ */
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
+static struct mci_platform_data __initdata q5x_mmc_data = {
+ .slot[0] = {
+ .bus_width = 4,
+ .detect_pin = AT91_PIN_PA5,
+ .wp_pin = -1,
+ },
+};
+#else
+static struct at91_mmc_data __initdata q5x_mmc_data = {
+ .slot_b = 0,
+ .wire4 = 1,
+ .det_pin = AT91_PIN_PA5,
+ .wp_pin = -EINVAL,
+ .vcc_pin = -EINVAL,
+};
+#endif
+
+static void __init q5x_add_device_mmc(void)
+{
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
+ at91_add_device_mci(0, &q5x_mmc_data);
+#else
+ at91_add_device_mmc(0, &q5x_mmc_data);
+#endif
+}
+
+/*
+ * GPIO LEDs
+ *
+ * The Q5x board has 3 dual-color LEDs: Status, Net, and RF.
+ */
+static struct gpio_led q5x_leds[] = {
+ { /* "stat" led, green */
+ .name = "stat_grn",
+ .gpio = AT91_PIN_PB16,
+ .active_low = 0,
+ .default_trigger = "heartbeat",
+ },
+ { /* "stat" led, red */
+ .name = "stat_red",
+ .gpio = AT91_PIN_PB17,
+ .active_low = 0,
+ .default_trigger = "none",
+ },
+ { /* "net" led, green */
+ .name = "net_grn",
+ .gpio = AT91_PIN_PB10,
+ .active_low = 0,
+ .default_trigger = "none",
+ },
+ { /* "net" led, red */
+ .name = "net_red",
+ .gpio = AT91_PIN_PB12,
+ .active_low = 0,
+ .default_trigger = "none",
+ },
+ { /* "rf" led, green */
+ .name = "rf_grn",
+ .gpio = AT91_PIN_PB18,
+ .active_low = 0,
+ .default_trigger = "none",
+ },
+ { /* "rf" led, red */
+ .name = "rf_red",
+ .gpio = AT91_PIN_PB19,
+ .active_low = 0,
+ .default_trigger = "none",
+ },
+};
+
+static void __init q5x_add_device_gpio_leds(void)
+{
+ at91_gpio_leds(q5x_leds, ARRAY_SIZE(q5x_leds));
+}
+
+static void __init q5x_board_init(void)
+{
+ /* Serial */
+ at91_add_device_serial();
+ /* USB Device */
+ at91_add_device_udc(&q5x_udc_data);
+ /* SPI */
+ q5x_add_device_spi();
+ /* Flash */
+ q5x_add_device_nor();
+ /* Ethernet */
+ q5x_add_device_macb();
+ /* MMC */
+ q5x_add_device_mmc();
+ /* LEDs */
+ q5x_add_device_gpio_leds();
+}
+
+/*
+ * Machine description struct
+ */
+MACHINE_START(Q5XR5, "Exegin Q5x (rev5)")
+ /* Maintainer: Owen Kirby - o...@exegin.com */
+ .timer = &at91sam926x_timer,
+ .map_io = at91_map_io,
+ .init_early = q5x_init_early,
+ .init_irq = at91_init_irq_default,
+ .init_machine = q5x_board_init,
+MACHINE_END
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