2013.02.27. 12:49 keltezéssel, Alexander Stadler írta: > From: Alexander Stadler <sa.mailli...@univie.ac.at> > > kernel support for dir-835-a1 > > Signed-off-by: Alexander Stadler <sa.mailli...@univie.ac.at> > --- > diff -urN a/target/linux/ar71xx/config-3.7 b/target/linux/ar71xx/config-3.7 > --- a/target/linux/ar71xx/config-3.7 2013-02-24 18:43:51.000000000 +0100 > +++ b/target/linux/ar71xx/config-3.7 2013-02-24 18:47:45.000000000 +0100 > @@ -40,6 +40,7 @@ > CONFIG_ATH79_MACH_DIR_615_C1=y > CONFIG_ATH79_MACH_DIR_825_B1=y > CONFIG_ATH79_MACH_DIR_825_C1=y > +CONFIG_ATH79_MACH_DIR_835_A1=y > CONFIG_ATH79_MACH_EAP7660D=y > CONFIG_ATH79_MACH_EW_DORIN=y > CONFIG_ATH79_MACH_HORNET_UB=y > diff -urN a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-835-a1.c > b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-835-a1.c > --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-835-a1.c > 1970-01-01 01:00:00.000000000 +0100 > +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-835-a1.c > 2013-02-24 18:46:24.000000000 +0100 > @@ -0,0 +1,179 @@ > +/* > + * D-Link DIR-835 rev. A1 board support > + * > + * Copyright (C) 2013 Alexander Stadler > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License version 2 as published > + * by the Free Software Foundation. > + */ > + > +#include <linux/pci.h> > +#include <linux/phy.h> > +#include <linux/gpio.h> > +#include <linux/platform_device.h> > +#include <linux/ath9k_platform.h> > +#include <linux/ar8216_platform.h> > + > +#include <asm/mach-ath79/ar71xx_regs.h> > + > +#include "common.h" > +#include "dev-ap9x-pci.h" > +#include "dev-eth.h" > +#include "dev-gpio-buttons.h" > +#include "dev-leds-gpio.h" > +#include "dev-m25p80.h" > +#include "dev-spi.h" > +#include "dev-usb.h" > +#include "dev-wmac.h" > +#include "machtypes.h" > + > +#define DIR835A1_GPIO_LED_ORANGE_POWER 14 > +#define DIR835A1_GPIO_LED_GREEN_POWER 22 > +#define DIR835A1_GPIO_LED_BLUE_WPS 15 > +#define DIR835A1_GPIO_LED_ORANGE_PLANET 19 > +#define DIR835A1_GPIO_LED_GREEN_PLANET 18 > + > +#define DIR835A1_GPIO_BTN_RESET 17 > +#define DIR835A1_GPIO_BTN_WPS 16 > + > +#define DIR835A1_KEYS_POLL_INTERVAL 20 /* msecs */ > +#define DIR835A1_KEYS_DEBOUNCE_INTERVAL (3 * > DIR835A1_KEYS_POLL_INTERVAL) > + > +#define DIR835A1_MAC0_OFFSET 0x4 > +#define DIR835A1_MAC1_OFFSET 0x18 > +#define DIR835A1_WMAC_CALDATA_OFFSET 0x1000 > +#define DIR835A1_PCIE_CALDATA_OFFSET 0x5000 > + > +static struct gpio_led dir835a1_leds_gpio[] __initdata = { > + { > + .name = "d-link:orange:power", > + .gpio = DIR835A1_GPIO_LED_ORANGE_POWER, > + .active_low = 1, > + }, > + { > + .name = "d-link:green:power", > + .gpio = DIR835A1_GPIO_LED_GREEN_POWER, > + .active_low = 1, > + }, > + { > + .name = "d-link:blue:wps", > + .gpio = DIR835A1_GPIO_LED_BLUE_WPS, > + .active_low = 1, > + }, > + { > + .name = "d-link:orange:planet", > + .gpio = DIR835A1_GPIO_LED_ORANGE_PLANET, > + .active_low = 1, > + }, > + { > + .name = "d-link:green:planet", > + .gpio = DIR835A1_GPIO_LED_GREEN_PLANET, > + .active_low = 1, > + }, > +}; > + > +static struct gpio_keys_button dir835a1_gpio_keys[] __initdata = { > + { > + .desc = "reset", > + .type = EV_KEY, > + .code = KEY_RESTART, > + .debounce_interval = DIR835A1_KEYS_DEBOUNCE_INTERVAL, > + .gpio = DIR835A1_GPIO_BTN_RESET, > + .active_low = 1, > + }, > + { > + .desc = "wps", > + .type = EV_KEY, > + .code = KEY_WPS_BUTTON, > + .debounce_interval = DIR835A1_KEYS_DEBOUNCE_INTERVAL, > + .gpio = DIR835A1_GPIO_BTN_WPS, > + .active_low = 1, > + }, > +}; > + > +static struct ar8327_pad_cfg dir835a1_ar8327_pad0_cfg = { > + .mode = AR8327_PAD_MAC_RGMII, > + .txclk_delay_en = true, > + .rxclk_delay_en = true, > + .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, > + .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, > +}; > + > +static struct ar8327_platform_data dir835a1_ar8327_data = { > + .pad0_cfg = &dir835a1_ar8327_pad0_cfg, > + .port0_cfg = { > + .force_link = 1, > + .speed = AR8327_PORT_SPEED_1000, > + .duplex = 1, > + .txpause = 1, > + .rxpause = 1, > + }, > +}; > + > +static struct mdio_board_info dir835a1_mdio0_info[] = { > + { > + .bus_id = "ag71xx-mdio.0", > + .phy_addr = 0, > + .platform_data = &dir835a1_ar8327_data, > + }, > +}; > + > +static void dir835a1_read_ascii_mac(u8 *dest, u8 *src) > +{ > + int ret; > + > + ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", > + &dest[0], &dest[1], &dest[2], > + &dest[3], &dest[4], &dest[5]); > + > + if (ret != ETH_ALEN) > + memset(dest, 0, ETH_ALEN); > +} > + > +static void __init dir835a1_setup(void) > +{ > + u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); > + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); > + u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; > + u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; > + > + dir835a1_read_ascii_mac(mac0, mac + DIR835A1_MAC0_OFFSET); > + dir835a1_read_ascii_mac(mac1, mac + DIR835A1_MAC1_OFFSET); > + > + ath79_register_m25p80(NULL); > + > + ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio), > + dir835a1_leds_gpio); > + ath79_register_gpio_keys_polled(-1, DIR835A1_KEYS_POLL_INTERVAL, > + ARRAY_SIZE(dir835a1_gpio_keys), > + dir835a1_gpio_keys); > + > + ath79_init_mac(wmac0, mac0, 0); > + ath79_register_wmac(art + DIR835A1_WMAC_CALDATA_OFFSET, wmac0); > + > + ath79_init_mac(wmac1, mac1, 1); > + ap91_pci_init(art + DIR835A1_PCIE_CALDATA_OFFSET, wmac1); > + > + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); > + > + mdiobus_register_board_info(dir835a1_mdio0_info, > + ARRAY_SIZE(dir835a1_mdio0_info)); > + > + ath79_register_mdio(0, 0x0); > + > + ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); > + > + /* GMAC0 is connected to an AR8327N switch */ > + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; > + ath79_eth0_data.phy_mask = BIT(0); > + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; > + ath79_eth0_pll_data.pll_1000 = 0x06000000; > + ath79_register_eth(0); > + > + ath79_register_usb(); > +} > + > +MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1", > + "D-Link DIR-835 rev. A1", > + dir835a1_setup);
This is quite similar to the DIR-825-C1 board, and the support should be implemented within the mach-dir-825-c1.c file. -Gabor _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel