L2 cache via L2X0 cache controller available on some ARM boards can provide a performance boost in some situations but decrease performance in others. This adds an option to the 'Global build settings' under 'kernel build options' to allow the user to choose without modifying target kernel configs directly.
This is valid for realview/cns3xxx targets. Signed-off-by: Tim Harvey <thar...@gateworks.com> --- Config.in | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/Config.in b/Config.in index cca5a4c..fcd1e9c 100644 --- a/Config.in +++ b/Config.in @@ -279,6 +279,23 @@ menu "Global build settings" default y # + # Performance tuning + # + + config KERNEL_CACHE_L2X0 + bool "Compile the kernel with L2 Cache support" + default y + depends on TARGET_cns3xxx || TARGET_realview + + help + Compile the kernel with support for using the L2x0 cache controller + (on platforms which have this and its use is optional). + + Enabling L2 cache can boost performance in certain use cases (CPU + bound use cases) but lower performance on others (IO bound + configurations). + + # # CGROUP support symbols # -- 1.7.5.4 _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel