I've made this change in the spi-bcm63xx module
@@ -103,7 +103,7 @@
{
u8 bits_per_word;
- bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word;
+ bits_per_word = (t && t->bits_per_word) ? t->bits_per_word :
spi->bits_per_word;
if (bits_per_word != 8) {
dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
__func__, bits_per_word);
Some dmesg:
root@OpenWrt:/# dmesg |grep 'spi\|mmc'
[ 0.500000] bcm63xx-spi bcm63xx-spi: registered master spi0
[ 0.500000] spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.500000] spi spi0.0: setup mode 0, 8 bits/w, 20000000 Hz max --> 0
[ 0.504000] bcm63xx-spi bcm63xx-spi: registered child spi0.0
[ 0.504000] bcm63xx-spi bcm63xx-spi: at 0xfffe0c00 (irq 9, FIFOs
size 63) v0.1.2
[ 0.580000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.580000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 20000000 Hz max --> 0
[ 0.580000] mmc_spi spi0.0: ASSUMING 3.2-3.4 V slot power
[ 0.588000] mmc_spi spi0.0: SD/MMC host mmc0, no DMA, no WP, no poweroff
[ 0.628000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.628000] mmc_spi spi0.0: txrx: tx 8093de00, rx 8093ef00, len 29
[ 0.656000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.656000] mmc_spi spi0.0: txrx: tx 8093de00, rx 8093ef00, len 10
[ 0.660000] mmc_spi spi0.0: setup: unsupported mode bits 4
[ 0.664000] mmc_spi spi0.0: can't change chip-select polarity
[ 0.672000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.672000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 0.696000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.696000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 18
[ 0.940000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.940000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 0.940000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.940000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 18
[ 0.940000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.940000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 0.940000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.940000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 0.944000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.944000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 0.944000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.944000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 21
[ 0.952000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.952000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 0.952000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.952000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 21
[ 0.992000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 0.992000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 0.992000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 0.992000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 1.276000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 1.276000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 1.516000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 1.516000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 1.548000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 1.548000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 1.552000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 1.552000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 1.744000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 1.744000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.212000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.216000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 21
[ 2.228000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.228000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.228000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.228000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.328000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.328000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.620000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.620000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 21
[ 2.620000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.620000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.620000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.620000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.620000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.620000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.620000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.620000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.620000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.620000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.636000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.636000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.636000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.636000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.636000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.636000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.636000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.636000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.652000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.652000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.652000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.652000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.652000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.652000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.652000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.652000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.668000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.668000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.668000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.668000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.668000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.668000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.668000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.668000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.668000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.668000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 9
[ 2.668000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.668000] mmc_spi spi0.0: txrx: tx 8093de00, rx 8093ef00, len 1
[ 2.668000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.668000] mmc_spi spi0.0: txrx: tx 8093de00, rx 8093ef00, len 1
[ 2.668000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.668000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.672000] mmc0: error -14 whilst initialising SD card
[ 2.676000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.676000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.684000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.684000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.684000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.684000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 21
[ 2.684000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.684000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.684000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.684000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.684000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.684000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.688000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.688000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.692000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.692000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.708000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.708000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.708000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.708000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.724000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.724000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.724000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.724000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.724000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.724000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 17
[ 2.724000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.724000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.724000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.724000] mmc_spi spi0.0: txrx: tx 8093ef00, rx 8093ef00, len 9
[ 2.724000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.724000] mmc_spi spi0.0: txrx: tx 8093de00, rx 8093ef00, len 1
[ 2.724000] mmc_spi spi0.0: Setting clock register to 01 (hz 0)
[ 2.724000] mmc_spi spi0.0: txrx: tx 8093de00, rx 8093ef00, len 1
[ 2.724000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
[ 2.728000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
[ 2.728000] mmc0: error -14 whilst initialising MMC card
At least now it doesn't complain about "mmc_spi spi0.0:
bcm63xx_spi_check_transfer, unsupported"
I still don't know if something missing in the code or just a problem
of hardware (should I add pullup resistors?).
Regards
2012/9/27 Florian Fainelli <flor...@openwrt.org>:
> On Wednesday 26 September 2012 22:35:00 dani wrote:
>> Ok, I started again with a clean kernel. These are exactly the changes I've
> made
>>
>>
>> --- board_livebox 1.c 2012-09-26 21:25:19.000000000 +0200
>> +++ board_livebox.c 2012-09-26 22:13:01.095795124 +0200
>> @@ -17,6 +17,7 @@
>> #include <linux/gpio_keys.h>
>> #include <linux/input.h>
>> #include <linux/spi/spi.h>
>> + #include <linux/spi/mmc_spi.h>
>> #include <asm/addrspace.h>
>> #include <bcm63xx_board.h>
>> #include <bcm63xx_cpu.h>
>> @@ -43,6 +44,19 @@
>> /*
>> * known 6348 boards
>> */
>> +static struct mmc_spi_platform_data blue5g_mmc_spi_pdata = {
>> + .detect_delay = 1000,
>> +};
>> +
>> +static struct spi_board_info blue5g_spi_devices[] = {
>> + {
>> + .modalias = "mmc_spi",
>> + .max_speed_hz = 20000000,
>> + .bus_num = 0,
>> + .platform_data = &blue5g_mmc_spi_pdata
>> + }
>> +};
>> +
>> #ifdef CONFIG_BCM63XX_CPU_6348
>> static struct board_info __initdata board_livebox_blue5g = {
>> .name = "Livebox-blue-5g",
>> @@ -118,6 +132,8 @@
>> },
>>
>> },
>> + .spis = blue5g_spi_devices,
>> + .num_spis = ARRAY_SIZE(blue5g_spi_devices),
>> };
>> #endif
>>
>>
>> I've enabled also
>> <*> Broadcom BCM63xx SPI controller
>> in the kernel since the BCM63XX HS SPI controller driver seem to be
>> for SoC > bcm6348
>> And
>> <*> MMC block device driver
>> (8) Number of minors per block device
>> [*] Use bounce buffer for simple hosts
>> <*> MMC/SD/SDIO over SPI
>> Also some related debug stuff.
>>
>> This is again the dmesg (more verbose):
>>
>> root@OpenWrt:/# dmesg |grep 'spi\|mmc'
>> [ 0.500000] bcm63xx-spi bcm63xx-spi: registered master spi0
>> [ 0.500000] spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
>> [ 0.500000] spi spi0.0: setup mode 0, 8 bits/w, 20000000 Hz max --> 0
>> [ 0.504000] bcm63xx-spi bcm63xx-spi: registered child spi0.0
>> [ 0.504000] bcm63xx-spi bcm63xx-spi: at 0xfffe0c00 (irq 9, FIFOs size 63)
> v0.1.2
>> [ 0.584000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
>> [ 0.584000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 20000000 Hz max --> 0
>> [ 0.584000] mmc_spi spi0.0: ASSUMING 3.2-3.4 V slot power
>> [ 0.592000] mmc0: clock 0Hz busmode 0 powermode 0 cs 0 Vdd 0 width 0 timing
> 0
>> [ 0.592000] mmc_spi spi0.0: SD/MMC host mmc0, no DMA, no WP, no poweroff
>> [ 0.600000] mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz
>> [ 0.608000] mmc0: clock 0Hz busmode 2 powermode 1 cs 1 Vdd 21 width 0 timing
> 0
>> [ 0.608000] mmc_spi spi0.0: mmc_spi: power up (21)
>> [ 0.636000] mmc0: clock 400000Hz busmode 2 powermode 2 cs 1 Vdd 21
>> width 0 timing 0
>> [ 0.640000] mmc_spi spi0.0: mmc_spi: power on (21)
>> [ 0.640000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 0.652000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 0.660000] mmc_spi spi0.0: setup: unsupported mode bits 4
>> [ 0.664000] mmc_spi spi0.0: can't change chip-select polarity
>> [ 0.672000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
>> [ 0.672000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
>> [ 0.672000] mmc_spi spi0.0: mmc_spi: clock to 400000 Hz, 0
>> [ 0.696000] mmc0: starting CMD52 arg 00000c00 flags 00000195
>> [ 0.696000] mmc_spi spi0.0: mmc_spi: CMD52, resp R2/R5
>> [ 0.696000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 0.724000] mmc_spi spi0.0: ... write returned -22
>> [ 0.724000] mmc0: req done (CMD52): -22: 00000000 00000000 00000000 00000000
>> [ 0.724000] mmc0: starting CMD52 arg 80000c08 flags 00000195
>> [ 0.724000] mmc_spi spi0.0: mmc_spi: CMD52, resp R2/R5
>> [ 0.724000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 0.740000] mmc_spi spi0.0: ... write returned -22
>> [ 0.740000] mmc0: req done (CMD52): -22: 00000000 00000000 00000000 00000000
>> [ 0.740000] mmc0: starting CMD0 arg 00000000 flags 000000c0
>> [ 0.740000] mmc_spi spi0.0: mmc_spi: CMD0, resp R1
>> [ 0.744000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 0.752000] mmc_spi spi0.0: ... write returned -22
>> [ 0.752000] mmc0: req done (CMD0): -22: 00000000 00000000 00000000 00000000
>> [ 0.752000] mmc0: starting CMD8 arg 000001aa flags 000002f5
>> [ 0.752000] mmc_spi spi0.0: mmc_spi: CMD8, resp R3/R4/R7
>> [ 0.992000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.000000] mmc_spi spi0.0: ... write returned -22
>> [ 1.000000] mmc0: req done (CMD8): -22: 00000000 00000000 00000000 00000000
>> [ 1.000000] mmc0: starting CMD5 arg 00000000 flags 000002e1
>> [ 1.000000] mmc_spi spi0.0: mmc_spi: CMD5, resp R3/R4/R7
>> [ 1.004000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.012000] mmc_spi spi0.0: ... write returned -22
>> [ 1.012000] mmc0: req failed (CMD5): -22, retrying...
>> [ 1.012000] mmc_spi spi0.0: mmc_spi: CMD5, resp R3/R4/R7
>> [ 1.012000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.020000] mmc_spi spi0.0: ... write returned -22
>> [ 1.020000] mmc0: req failed (CMD5): -22, retrying...
>> [ 1.020000] mmc_spi spi0.0: mmc_spi: CMD5, resp R3/R4/R7
>> [ 1.020000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.028000] mmc_spi spi0.0: ... write returned -22
>> [ 1.028000] mmc0: req failed (CMD5): -22, retrying...
>> [ 1.028000] mmc_spi spi0.0: mmc_spi: CMD5, resp R3/R4/R7
>> [ 1.028000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.036000] mmc_spi spi0.0: ... write returned -22
>> [ 1.036000] mmc0: req done (CMD5): -22: 00000000 00000000 00000000 00000000
>> [ 1.036000] mmc0: starting CMD55 arg 00000000 flags 000000f5
>> [ 1.036000] mmc_spi spi0.0: mmc_spi: CMD55, resp R1
>> [ 1.036000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.044000] mmc_spi spi0.0: ... write returned -22
>> [ 1.044000] mmc0: req done (CMD55): -22: 00000000 00000000 00000000 00000000
>> [ 1.044000] mmc0: starting CMD55 arg 00000000 flags 000000f5
>> [ 1.044000] mmc_spi spi0.0: mmc_spi: CMD55, resp R1
>> [ 1.044000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.052000] mmc_spi spi0.0: ... write returned -22
>> [ 1.052000] mmc0: req done (CMD55): -22: 00000000 00000000 00000000 00000000
>> [ 1.052000] mmc0: starting CMD55 arg 00000000 flags 000000f5
>> [ 1.052000] mmc_spi spi0.0: mmc_spi: CMD55, resp R1
>> [ 1.052000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.060000] mmc_spi spi0.0: ... write returned -22
>> [ 1.060000] mmc0: req done (CMD55): -22: 00000000 00000000 00000000 00000000
>> [ 1.060000] mmc0: starting CMD55 arg 00000000 flags 000000f5
>> [ 1.060000] mmc_spi spi0.0: mmc_spi: CMD55, resp R1
>> [ 1.060000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.068000] mmc_spi spi0.0: ... write returned -22
>> [ 1.068000] mmc0: req done (CMD55): -22: 00000000 00000000 00000000 00000000
>> [ 1.068000] mmc0: starting CMD1 arg 00000000 flags 000000e1
>> [ 1.068000] mmc_spi spi0.0: mmc_spi: CMD1, resp R1
>> [ 1.068000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> bits_per_word=0
>> [ 1.080000] mmc_spi spi0.0: ... write returned -22
>> [ 1.080000] mmc0: req done (CMD1): -22: 00000000 00000000 00000000 00000000
>> [ 1.080000] mmc0: clock 0Hz busmode 2 powermode 0 cs 1 Vdd 0 width 0 timing
> 0
>> [ 1.080000] mmc_spi spi0.0: mmc_spi: power off (0)
>>
>>
>> Did anybody ever used the bcm6348 spi interface in these boards?. I
>> think nobody really tested it.
>
> It is used by a couple of people that I know about, and they actually helped
> me a lot debugging the driver on BCM6348.
>
>>
>> I'm afraid the SPI controler Openwrt code is broken for bcm6348.
>
> It is not broken, now please dig a little further to understand how you can
> get into bcm63xx_spi_check_transfer() with either the transfer->bits_per_word
> of the spi_device->bits_per_word set to 0.
>
>>
>>
>>
>>
>>
>>
>> 2012/9/26 Florian Fainelli <flor...@openwrt.org>
>> >
>> > Hello,
>> >
>> > On Wednesday 26 September 2012 14:41:51 dani wrote:
>> > > Hi, I'm trying to make a micro sd card work connected to a bcm6348 board
>> > > (livebox 1) SPI pins. I guessed the platform file of my device should be
>> > > modified in order to make the kernel comunicate with the mmc_spi and
>> > > recognice the microsd card.
>> > >
>> > > I added this code in my platform data file (board_livebox.c):
>> > >
>> >
> ---------------------------------------------------------------------------------------------------------
>> > > static struct mmc_spi_platform_data blue5g_mmc_spi_pdata = {
>> > > .detect_delay = 1000,
>> > > };
>> > >
>> > > static struct bcm63xx_spi_pdata mmc_spi_chip_info = {
>> > > .msg_ctl_width = 8,
>> > > .msg_type_shift = 6,
>> > > .num_chipselect = 1,
>> > > };
>> > >
>> > > static struct spi_board_info blue5g_spi_devices[] = {
>> > > {
>> > > .modalias = "mmc_spi",
>> > > .max_speed_hz = 20000000,
>> > > .bus_num = 0,
>> > > .controller_data = &mmc_spi_chip_info,
>> >
>> > I do not think this belongs here. dev-spi.c already takes care of properly
>> > registering the SPI controller with the appropriate msg_ctl_width and
>> > msg_type_shift.
>> >
>> > > .platform_data = &blue5g_mmc_spi_pdata
>> > > }
>> > > };
>> > >
>> > > etc.
>> > >
>> >
> ---------------------------------------------------------------------------------------------------------
>> > >
>> > > I get this kernel messages when booting OpenWrt:
>> > >
>> > > root@OpenWrt:/# dmesg |grep spi
>> > > [ 0.500000] bcm63xx-spi bcm63xx-spi: registered master spi0
>> > > [ 0.500000] spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0 nsec/bit
>> > > [ 0.500000] spi spi0.0: setup mode 0, 8 bits/w, 20000000 Hz max --> 0
>> > > [ 0.504000] bcm63xx-spi bcm63xx-spi: registered child spi0.0
>> > > [ 0.504000] bcm63xx-spi bcm63xx-spi: at 0xfffe0c00 (irq 9, FIFOs size 63)
>> > > v0.1.2
>> > > [ 0.580000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0
> nsec/bit
>> > > [ 0.580000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 20000000 Hz max -->
> 0
>> > > [ 0.580000] mmc_spi spi0.0: ASSUMING 3.2-3.4 V slot power
>> > > [ 0.588000] mmc_spi spi0.0: SD/MMC host mmc0, no DMA, no WP, no poweroff
>> > > [ 0.628000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 0.664000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 0.672000] mmc_spi spi0.0: setup: unsupported mode bits 4
>> > > [ 0.680000] mmc_spi spi0.0: can't change chip-select polarity
>> > > [ 0.684000] mmc_spi spi0.0: bcm63xx_spi_setup, mode 0, 8 bits/w, 0
> nsec/bit
>> > > [ 0.684000] mmc_spi spi0.0: setup mode 0, 8 bits/w, 400000 Hz max --> 0
>> > > [ 0.704000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> >
>> > This does not look good, since the mmc_spi driver explicitely sets
>> > bits_per_word to 8, but for some reason the spi_transfer does not inherit
> from
>> > this, and we end up refusing the transfer.
>> >
>> > > [ 0.724000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 0.972000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 0.980000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 0.988000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 0.996000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.008000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.016000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.024000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.032000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.040000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.048000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > > [ 1.056000] mmc_spi spi0.0: bcm63xx_spi_check_transfer, unsupported
>> > > bits_per_word=0
>> > >
>> > > I tried different values/variables in the previous code, but with almost
>> > > the same result always. Isn't the mmc_spi supported by this particular
>> > > SoC?. Any bug? or did I miss something?
>> >
>> > I do not think you have posted every change you made
>> >
>> > >
>> > > I use a 8GB Kingston SDHC (Class 4) microSD which seems to be tested OK
> in
>> > > a RB433AH acordingly to:
>> > > http://wiki.mikrotik.com/wiki/Supported_Hardware#Memory_cards
>> > >
>> > > The pins are soldered directly fom the card to CS, MOSI, MISO, CLK spi
> pins
>> > > at the SoC. No gpio used for CS.
>> > >
>> > > Regards.
>> _______________________________________________
>> openwrt-devel mailing list
>> openwrt-devel@lists.openwrt.org
>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
> --
> Florian
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