Hi Nathan,
On 03/23/2012 08:50 PM, Nathan Hintz wrote:
> Changes since v1: Patch file renamed (235-bcma-enable-irq6.patch).
>
> Signed-off-by: Nathan Hintz <nlhi...@hotmail.com>
>
> --- /dev/null
> +++ target/linux/brcm47xx/patches-3.2/235-bcma-enable-irq6.patch
> @@ -0,0 +1,29 @@
> +--- a/drivers/bcma/driver_mips.c
> ++++ b/drivers/bcma/driver_mips.c
> +@@ -75,7 +75,7 @@
> + return dev->core_index;
> + flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
> +
> +- return flag & 0x1F;
> ++ return (flag ? (flag & 0x1F) : 0x3F);
Why do you want to that? This results in assiningning irq 8 to some
cores where the irq is never used by us.
The Broadcom SDK does the following for our chip:
si_setirq(sih, 1, D11_CORE_ID, 0);
si_setirq(sih, 2, GMAC_CORE_ID, 0);
si_setirq(sih, 3, USB20H_CORE_ID, 0);
si_setirq(sih, 4, PCIE_CORE_ID, 0);
si_setirq(sih, 0, CC_CORE_ID, 0);
si_setirq(sih, 0, I2S_CORE_ID, 0);
> + }
> +
> + /* Get the MIPS IRQ assignment for a specified device.
> +@@ -88,6 +88,8 @@
> + unsigned int irq;
> +
> + irqflag = bcma_core_mips_irqflag(dev);
> ++ if (irqflag == 0x3F)
> ++ return 6;
> +
> + for (irq = 1; irq <= 4; irq++)
> + if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
> +@@ -244,7 +246,7 @@
> + core->irq = 0;
> + else
> + core->irq = mips_irq + 2;
> +- if (core->irq > 5)
> ++ if (core->irq > 6)
This looks good to me.
> + continue;
> + switch (core->id.id) {
> + case BCMA_CORE_PCI:
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