It has been confirmed by Atheros that this PCI bug affects the RX side only, so we can keep the 128B DMA size for TX.
With this change we can double the thruput of ath5k from 15Mps to 30Mbps. We have been using this patch since more than 6 month in a production environment without problems and a significant performance improvement. It has also been said to fix HW encryption: http://www.mail-archive.com/ath5k-devel@lists.ath5k.org/msg04311.html --- .../patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch index b216b9d..d181971 100644 --- a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch +++ b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch @@ -9,7 +9,7 @@ { AR5K_RXCFG, AR5K_DMASIZE_128B }, +#else + /* WAR for AR71xx PCI bug */ -+ { AR5K_TXCFG, AR5K_DMASIZE_4B }, ++ { AR5K_TXCFG, AR5K_DMASIZE_128B }, + { AR5K_RXCFG, AR5K_DMASIZE_4B }, +#endif { AR5K_CFG, AR5K_INIT_CFG }, @@ -29,7 +29,7 @@ +#else + /* WAR for AR71xx PCI bug */ + AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, -+ AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_4B); ++ AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B); + AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, + AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_4B); +#endif _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
