Michael Buesch, you are right.. what do you think about this patch?

This need:
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2
init=/etc/preinit noinitrd console=ttyS0,115200 no_console_suspend irqpoll
acpi_noirq"

a/drivers/ssb/driver_mipscore.c       2008-05-19 11:09:26.000000000 -0400
b/drivers/ssb/driver_mipscore.c       2008-06-04 09:19:01.000000000 -0400
@@ -201,22 +203,23 @@
                dev->irq = ssb_mips_irq(dev) + 2;
                switch (dev->id.coreid) {
                case SSB_DEV_USB11_HOST:
-                       /* shouldn't need a separate irq line for non-4710,
most of them have a proper
-                        * external usb controller on the pci */
-                       if ((bus->chip_id == 0x4710) && (irq <= 4)) {
+               case SSB_DEV_USB20_HOST:
+                        /* shouldn't need a separate irq line for non-4710,
most of them have a proper
+                       * external usb controller on the pci */
+                       if (((bus->chip_id == 0x4710) || (bus->chip_id ==
0x5354)) && (irq <= 4)) {
                                set_irq(dev, irq++);
                                break;
                        }
                        /* fallthrough */
                case SSB_DEV_PCI:
                case SSB_DEV_ETHERNET:
                case SSB_DEV_ETHERNET_GBIT:
                case SSB_DEV_80211:
-               case SSB_DEV_USB20_HOST:
                        /* These devices get their own IRQ line if available,
the rest goes on IRQ0 */
                        if (irq <= 4) {
                                set_irq(dev, irq++);
                                break;
                        }
                }
        }


---
/opt/openwrt-2.6.26/build_dir/linux-brcm47xx/linux-2.6.26-rc1-git1/drivers/usb/host/ohci-ssb.c
     2008-05-31 23:24:25.000000000 -0400
+++ drivers/usb/host/ohci-ssb.c 2008-06-04 10:05:30.000000000 -0400
@@ -60,6 +60,36 @@
        return err;
 }

+#ifdef CONFIG_PM
+static int ssb_ohci_hcd_suspend(struct usb_hcd *hcd, pm_message_t message)
+{
+       struct ssb_ohci_device *ohcidev = hcd_to_ssb_ohci(hcd);
+       struct ohci_hcd *ohci = &ohcidev->ohci;
+       unsigned long flags;
+
+       spin_lock_irqsave(&ohci->lock, flags);
+
+       ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
+       ohci_readl(ohci, &ohci->regs->intrdisable); /* commit write */
+
+       /* make sure snapshot being resumed re-enumerates everything */
+       if (message.event == PM_EVENT_PRETHAW)
+               ohci_usb_reset(ohci);
+
+       clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+
+       spin_unlock_irqrestore(&ohci->lock, flags);
+       return 0;
+}
+
+static int ssb_ohci_hcd_resume(struct usb_hcd *hcd)
+{
+       set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
+       usb_hcd_resume_root_hub(hcd);
+       return 0;
+}
+#endif /* CONFIG_PM */
+
 static const struct hc_driver ssb_ohci_hc_driver = {
        .description            = "ssb-usb-ohci",
        .product_desc           = "SSB OHCI Controller",
@@ -73,6 +103,11 @@
        .stop                   = ohci_stop,
        .shutdown               = ohci_shutdown,

+#ifdef CONFIG_PM
+       .suspend                = ssb_ohci_hcd_suspend,
+       .resume                 = ssb_ohci_hcd_resume,
+#endif
+
        .urb_enqueue            = ohci_urb_enqueue,
        .urb_dequeue            = ohci_urb_dequeue,
        .endpoint_disable       = ohci_endpoint_disable,
@@ -81,6 +116,7 @@

        .hub_status_data        = ohci_hub_status_data,
        .hub_control            = ohci_hub_control,
+       .hub_irq_enable         = ohci_rhsc_enable,
 #ifdef CONFIG_PM
        .bus_suspend            = ohci_bus_suspend,
        .bus_resume             = ohci_bus_resume,
@@ -96,7 +132,6 @@
        usb_remove_hcd(hcd);
        iounmap(hcd->regs);
        usb_put_hcd(hcd);
-       ssb_device_disable(dev, 0);
 }

 static int ssb_ohci_attach(struct ssb_device *dev)
@@ -106,10 +141,73 @@
        int err = -ENOMEM;
        u32 tmp, flags = 0;

-       if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV)
+       if (!(ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET))
+               goto core_already_enabled;
+
+       /*
+        * THE FOLLOWING COMMENTS PRESERVED FROM GPL SOURCE RELEASE
+        *
+        * The USB core requires a special bit to be set during core
+        * reset to enable host (OHCI) mode. Resetting the SB core in
+        * pcibios_enable_device() is a hack for compatibility with
+        * vanilla usb-ohci so that it does not have to know about
+        * SB. A driver that wants to use the USB core in device mode
+        * should know about SB and should reset the bit back to 0
+        * after calling pcibios_enable_device().
+        */
+
+       if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV){
+               if (ssb_device_is_enabled(dev))
+                        goto core_already_enabled;
                flags |= SSB_OHCI_TMSLOW_HOSTMODE;
+               ssb_device_enable(dev, flags);
+       }

-       ssb_device_enable(dev, flags);
+       /*
+        * USB 2.0 special considerations:
+        *
+        * 1. Since the core supports both OHCI and EHCI functions, it must
+        *    only be reset once.
+        *
+        * 2. In addition to the standard SB reset sequence, the Host Control
+        *    Register must be programmed to bring the USB core and various
+        *    phy components out of reset.
+        */
+
+       else if (dev->id.coreid == SSB_DEV_USB20_HOST) {
+               if (ssb_device_is_enabled(dev))
+                       goto core_already_enabled;
+               ssb_device_enable(dev, 0);
+               ssb_write32(dev, 0x200, 0x7ff);
+               udelay(1);
+               if (dev->id.revision == 1) { // bug in rev 1
+
+                       /* Change Flush control reg */
+                       tmp = ssb_read32(dev, 0x400);
+                       tmp &= ~8;
+                       ssb_write32(dev, 0x400, tmp);
+                       tmp = ssb_read32(dev, 0x400);
+                       printk(KERN_INFO "USB20H fcr: 0x%0x\n", tmp);
+
+                       /* Change Shim control reg */
+                       tmp = ssb_read32(dev, 0x304);
+                       tmp &= ~0x100;
+                       ssb_write32(dev, 0x304, tmp);
+                       tmp = ssb_read32(dev, 0x304);
+                       printk(KERN_INFO "USB20H shim: 0x%0x\n", tmp);
+               }
+       }
+       else
+               ssb_device_enable(dev, 0);
+
+core_already_enabled:
+
+       /*
+       * Set dma mask - 32 bit mask is just an assumption
+       */
+       if (ssb_dma_set_mask(dev, DMA_32BIT_MASK))
+               return -EOPNOTSUPP;

        hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev,
                        dev->dev->bus_id);
@@ -188,7 +286,6 @@

        ssb_device_enable(dev, ohcidev->enable_flags);

-       ohci_finish_controller_resume(hcd);
        return 0;
 }

@@ -200,6 +297,7 @@
 static const struct ssb_device_id ssb_ohci_table[] = {
        SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
        SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
+       SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
        SSB_DEVTABLE_END
 };
 MODULE_DEVICE_TABLE(ssb, ssb_ohci_table);
@@ -212,3 +310,4 @@
        .suspend        = ssb_ohci_suspend,
        .resume         = ssb_ohci_resume,
 };
+




---- Mensagem Original ----
From: "Michael Buesch" <[EMAIL PROTECTED]>
To: openwrt-devel@lists.openwrt.org
Sent: Ter, Junho 3, 2008 12:22 pm
Subject: Re: [OpenWrt-Devel] [PATCH] usb ehci driver for ssb

On Monday 02 June 2008 23:30:52 Steve Brown wrote:
> This patch adds a ssb ehci driver as well as support for ssb
> multifunction cores.
>
> It is needed to use the ehci function in the BCM5354's USB2 core.
>
> See https://dev.openwrt.org/ticket/3365 and
> http://forum.openwrt.org/viewtopic.php?id=15106&p=2 for reports of
> independent testing.
>
> Signed-off-by: Steve Brown <[EMAIL PROTECTED]>

Your changes to the ssb scanning look like a horrible hack.
What are you trying to do? The addition of the "nr_cores" variable
looks bogus, too. I think this should all be handled in the driver, like
b43 does it, too. b43 is also a multifunction device.

--
Greetings Michael.
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