On Wed, 21 May 2008, [EMAIL PROTECTED] wrote:

> On Mon, 12 May 2008, lunight wrote:
>
>>  Hi all,
>>        do any body knows what the solaris does when a context/address
>>        switch happens?
>>        since the entity of solaris schedule is kernel thread , and not like
>>        linux , solaris separates user address space and kernel address, so
>>        when a thread make a syscall, there will be a address space changing
>>        ..my question is :how the kernel make this happens? I know there is
>>        an ASI register in SPARC, it is said ASI has something to do with
>>        this procedure, anybody knows how to use it? another question is :is
>>        there any register like the cr3(x86) in sparc ? how to use it?
>>
>>        I want to know these answers for so long..thx for your help.
>
> Hmm, seen there's still no answer - so here we go ;-)
>
> Unlike x86, where there is only _one_ MMU context register (%cr3), SPARC has 
> different MMU contexts depending on the CPU state. In other words, the CPU 
> switches the default MMU context when it switches privileges.
>
> That's simplified, but close. Think of it a bit like the x86 architecture 
> switches %esp/%rsp when switching privileges - that's something done 
> implicitly there, based on the TSS settings for the various stacks. On SPARC, 
> that needs to be done explicitly.
>
> It's the other way round with the MMU context, where x86 requires an explicit 
> switch (if you'd want one), while on SPARC(v9) it's explicit.
>
> There are two MMU contexts - ASI_PRIMARY and ASI_SECONDARY, and a change in 
> processor state (such as a trap) changes which one is used by default.
>
> The rules (and involved registers / ASIs) are given in the sparcv9 joint 
> programming specification, appendix F.5, see there for a summary:

Sorry for following up myself, slight correction there, the "quick 
reference" for these rules is the table in appendix F.7 not F.5.

>
> http://www.fujitsu.com/downloads/PRMPWR/JPS1-R1.0.4-Common-pub.pdf
>
> Best regards,
> FrankH.

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