Hello,
in the meantime, I connected "broken" JLink to the good one to read the
firmware. But I could not init the target. I got following:
D:\projects\arm-CortexM3>openocd -f sam7x256.cfg
Open On-Chip Debugger 0.4.0 (2010-02-22-19:05)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
1 kHz
jtag_nsrst_assert_width: 10
jtag_nsrst_delay: 100
srst_only separate srst_gates_jtag srst_open_drain
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM V8 compiled Aug 24 2011 17:23:32
Info : JLink caps 0xb9ff7bbf
Info : JLink hw version 80000
Info : JLink max mem block 9424
Info : Vref = 3.364 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 0 TRST = 0
Info : J-Link JTAG Interface ready
Info : clock speed 1 kHz
Info : JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part:
0xf0f0, ver: 0x3)
Warn : Unexpected idcode after end of chain: 32 0x00000000
Warn : Unexpected idcode after end of chain: 64 0x00000000
Warn : Unexpected idcode after end of chain: 96 0x00000000
Warn : Unexpected idcode after end of chain: 128 0x00000000
Warn : Unexpected idcode after end of chain: 160 0x00000000
Warn : Unexpected idcode after end of chain: 192 0x00000000
Warn : Unexpected idcode after end of chain: 224 0x00000000
Warn : Unexpected idcode after end of chain: 256 0x00000000
Warn : Unexpected idcode after end of chain: 288 0x00000000
Warn : Unexpected idcode after end of chain: 320 0x00000000
Warn : Unexpected idcode after end of chain: 352 0x00000000
Warn : Unexpected idcode after end of chain: 384 0x00000000
Warn : Unexpected idcode after end of chain: 416 0x00000000
Warn : Unexpected idcode after end of chain: 448 0x00000000
Warn : Unexpected idcode after end of chain: 480 0x00000000
Warn : Unexpected idcode after end of chain: 512 0x00000000
Warn : Unexpected idcode after end of chain: 544 0x00000000
Warn : Unexpected idcode after end of chain: 576 0x00000000
Warn : Unexpected idcode after end of chain: 608 0x00000000
Error: double-check your JTAG setup (interface, speed, missing TAPs, ...)
Info : JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part:
0xf0f0, ver: 0x3)
Warn : Unexpected idcode after end of chain: 32 0x00000000
Warn : Unexpected idcode after end of chain: 64 0x00000000
Warn : Unexpected idcode after end of chain: 96 0x00000000
Warn : Unexpected idcode after end of chain: 128 0x00000000
Warn : Unexpected idcode after end of chain: 160 0x00000000
Warn : Unexpected idcode after end of chain: 192 0x00000000
Warn : Unexpected idcode after end of chain: 224 0x00000000
Warn : Unexpected idcode after end of chain: 256 0x00000000
Warn : Unexpected idcode after end of chain: 288 0x00000000
Warn : Unexpected idcode after end of chain: 320 0x00000000
Warn : Unexpected idcode after end of chain: 352 0x00000000
Warn : Unexpected idcode after end of chain: 384 0x00000000
Warn : Unexpected idcode after end of chain: 416 0x00000000
Warn : Unexpected idcode after end of chain: 448 0x00000000
Warn : Unexpected idcode after end of chain: 480 0x00000000
Warn : Unexpected idcode after end of chain: 512 0x00000000
Warn : Unexpected idcode after end of chain: 544 0x00000000
Warn : Unexpected idcode after end of chain: 576 0x00000000
Warn : Unexpected idcode after end of chain: 608 0x00000000
Error: double-check your JTAG setup (interface, speed, missing TAPs, ...)
Command handler execution failed
Warn : jtag initialization failed; try 'jtag init' again.
I use original sam7x256.cfg. I just added following lines at the beginning:
interface jlink
jtag_khz 1
jtag_nsrst_assert_width 10
jtag_nsrst_delay 100
reset_config srst_only
I found that more people has problems with ATMEL chips:
http://forum.sparkfun.com/viewtopic.php?t=19958
http://www.proxmark.org/forum/viewtopic.php?pid=3348
What is the correct setting then? Should I connect RTCK somewhere ? Any
experience with it ?
For those interested, I can connect logic analyzer to JTAG and capture some
waves...
Vaclav
_______________________________________________
Openocd-development mailing list
Openocd-development@lists.berlios.de
https://lists.berlios.de/mailman/listinfo/openocd-development
