Hey all,
Found some mistakes in the presentation of the 'at91sam3s info'
command. They are all minor. A patch is attached.
Cheers,
- Thomas
From 7b23852e89022928eee9bc2cb3f6ae27c2a247e7 Mon Sep 17 00:00:00 2001
From: Thomas Schmid <thomas.sch...@gmail.com>
Date: Tue, 25 Jan 2011 08:15:30 -0800
Subject: [PATCH] Fixed small mistakes in at91sam3 info command
---
src/flash/nor/at91sam3.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 0915ba7..f895935 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -1464,7 +1464,7 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
LOG_USER("(main osc bypass: %s)",
_yes_or_no(v));
- rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 2, 1);
+ rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1);
LOG_USER("(onchip RC-OSC enabled: %s)",
_yes_or_no(rcen));
v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
@@ -1476,6 +1476,7 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
switch (v) {
default:
pChip->cfg.rc_freq = 0;
+ break;
case 0:
pChip->cfg.rc_freq = 4 * 1000 * 1000;
break;
@@ -1628,6 +1629,7 @@ sam3_explain_mckr(struct sam3_chip *pChip)
case 0:
pdiv = 1;
cp = "selected clock";
+ break;
case 1:
pdiv = 2;
cp = "clock/2";
--
1.7.1
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