--- On Tue, 1/11/11, Peter Stuge <pe...@stuge.se> wrote:
> From: Peter Stuge <pe...@stuge.se> > Subject: Re: [Openocd-development] SWD progress > To: openocd-development@lists.berlios.de > Date: Tuesday, January 11, 2011, 11:06 PM > simon qian wrote: > > SWD in Versaloon is based on operation. > > For example: A read operation consists of : > > 1. Host send the 8-bit command, and trn > > 2. read 3-bit ack > > 3. read the 32-bit data and 1-bit parity > > 4. host send the last trn > > > > So Versaloon can do some error handler. > > Tomek, does it sound like this is similar to what libswd > outputs? Sounds like a bit-level description of most any SWD wire transaction... > In that case it might be easy to abstract > libswd/versaloon. > > How is this not already done in the SWD transpsort defs? Implementations of the SWD ops to read/write registers must do those bitop sequences as driver ops. > In that case it might be easy to abstract > libswd/versaloon. > > > //Peter > _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
