via Google search, I found the following, which, in conjunction with the Cortex-A9 reference manuals from ARM, may be of interest to folk looking at OMAP4 and other recent TI chips for OpenOCD; it looked to answer some of the questions I've heard on this list.
http://processors.wiki.ti.com/index.php/ICEPICK (Also of course you'd use the ARMv7A manual too, but large chunks of that already have debug support in OpenOCD, ( ... for Cortex-A8 cores as on OMAP3, (plus ARMv6/ARM11). Linked from that page is a PDF document http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf which may be more information than was public when ICEPICK-C support was added to OpenOCD, enabling DaVinci and OMAP3 operations. (And FWIW, the link-in-a-TAP sequences looked similar at first glance.) The public OMAP4430 reference manual tells which cores are at which address on the ICEpick-D ... e.g. the Cortex-A9 DAP is #9, the Cortex-M3 cores (Ducati) are at #4 and #5, and there are even two ARM968 cores at addresses #2 and #3 (presumably for what older OMAPs used ARM7 cores). (Plus of course the C6000x+ DSP.) Not clear which of those we should be configuring into our scan_chain, maybe just the A9 to start. (That will keep scans faster, and reduce power usage during debug.) I'm thinking the current ICEpick support may need to be packaged as specifically ICEpick-C support; maybe some can be shared with ICEPick-D, I've not investigated yet. _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development