On 2010-12-22 18:31, Spencer Oliver wrote:
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg index 86e6ebb..eef1269 100644 --- a/tcl/target/stm32.cfg +++ b/tcl/target/stm32.cfg @@ -52,18 +52,22 @@ if { [info exists BSTAPID ] } { set _BSTAPID4 0x06414041 # Connectivity line devices, Rev A and Rev Z set _BSTAPID5 0x06418041 + # XL line devices, Rev A + set _BSTAPID6 0x06430041 } jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ - -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 + -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \ + -expected-id $_BSTAPID6set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 +# flash size will be probed set _FLASHNAME $_CHIPNAME.flash -flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME +flash bank $_FLASHNAME stm32x 0x08000000 0 0 0 $_TARGETNAME # if srst is not fitted use SYSRESETREQ to # perform a soft reset diff --git a/tcl/target/stm32xl.cfg b/tcl/target/stm32xl.cfg new file mode 100644 index 0000000..cde07df --- /dev/null +++ b/tcl/target/stm32xl.cfg @@ -0,0 +1,6 @@ +# script for stm32xl family (dual flash bank) +source [find target/stm32.cfg] + +# flash size will be probed +set _FLASHNAME $_CHIPNAME.flash1 +flash bank $_FLASHNAME stm32x 0x08080000 0 0 0 $_TARGETNAME
If there is another target file for XL devices, maybe the BSTAPIDs shouldn't be added to stm32.cfg file, but rather provided in stm32xl.cfg before including stm32.cfg?
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