All device vendors should provide BSDL files for their devices which
specify the maximum TCK speed the device can support. This can be
used to create an auto-configuration that is fairly easy to use and
robust.
An example of this is the Xilinx programming tools. They do an
initial shift at a low speed to find the JTAG ID's of each device.
Once the device IDs are found a search is done against the BSDL files
to find a matching description. Once that is complete the lowest
maximum JTAG speed is used as an initial configuration based on the
BSDL information. As an added benefit the JTAG instruction lengths
are also defined in the BSDL so it does not need to be configured
manually.
If you see failures then you have the option of manually lowering the
maximum JTAG frequency which overrides the BSDL files.
-Karl
BSDL give some informations as max JTAG frequency. The bad things are :
- not all devices come with BSDL (in general the device not supporting
the boundary scan, do not provide BSDL files -> low cost LPC parts ...)
- Amontec has found that the frequency notified in the BSDL file is not
really the maximum frequency but sometimes absolute max frequency - 50%!
The BSDL are not really a good thing for the major work of openocd user
doing on-chip debug -> and not on-board debug (boundary scan)
Regards,
Laurent
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