On Friday 29 October 2010 09:37:36 Øyvind Harboe wrote:
> > Oyvind sorry, I just can't find it ... could you tell me where it is
> > please ?
>
> Start here:
>
> https://lists.berlios.de/pipermail/openocd-development/2010-September/01648
> 2.html
Hey,
I went through all of this stuff tonight ... and I came to a conclusion, that
MEM-AP contains register called BASE whose top 20 bytes should contain the
debug
base address. From my observation, if I run:
> dap info 1
AP ID register 0x04770002
Type is MEM-AP APB
AP BASE 0x80000000
ROM table in legacy format
CID3 0x00, CID2 0x00, CID1 0x00, CID0 0x00
MEMTYPE System memory not present. Dedicated debug bus.
ROMTABLE[0x0] = 0x0
End of ROM table
I get no data. Though if I artificially adjust the dbgbase to 0x60000000 in
arm_adi_v5.c, I get the following stuff. So, is the processor just making fun
of
me and misreporting the debug base or did I just miss something? This is what I
get after the adjustment
> dap info 1
AP ID register 0x04770002
Type is MEM-AP APB
AP BASE 0x60000000
ROM table in legacy format
CID3 0xb1, CID2 0x05, CID1 0x10, CID0 0x0d
MEMTYPE System memory not present. Dedicated debug bus.
ROMTABLE[0x0] = 0x1003
Component base address 0x60001000, start address 0x60001000
Component class is 0x9, CoreSight component
Type is 0x21, Trace Sink, Buffer
Peripheral ID[4..0] = hex 04 00 0b b9 07
Part is Coresight ETB (Trace Buffer)
ROMTABLE[0x4] = 0x2003
Component base address 0x60002000, start address 0x60002000
Component class is 0x9, CoreSight component
Type is 0x13, Trace Source, Processor
Peripheral ID[4..0] = hex 04 10 4b b9 21
Part is Cortex-A8 ETM (Embedded Trace)
ROMTABLE[0x8] = 0x3003
Component base address 0x60003000, start address 0x60003000
Component class is 0x9, CoreSight component
Type is 0x11, Trace Sink, Port
Peripheral ID[4..0] = hex 04 00 4b b9 12
Part is Coresight TPIU (Trace Port Interface Unit)
ROMTABLE[0xc] = 0x4003
Component base address 0x60004000, start address 0x60004000
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Peripheral ID[4..0] = hex 04 10 4b b9 22
Part is Cortex-A8 CTI (Cross Trigger)
ROMTABLE[0x10] = 0x5003
Component base address 0x60005000, start address 0x60005000
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Peripheral ID[4..0] = hex 04 00 0b b9 06
Part is Coresight CTI (Cross Trigger)
ROMTABLE[0x14] = 0x6003
Component base address 0x60006000, start address 0x60006000
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Peripheral ID[4..0] = hex 04 00 0b b9 06
Part is Coresight CTI (Cross Trigger)
ROMTABLE[0x18] = 0x7003
Component base address 0x60007000, start address 0x60007000
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Peripheral ID[4..0] = hex 04 00 0b b9 06
Part is Coresight CTI (Cross Trigger)
ROMTABLE[0x1c] = 0x8003
Component base address 0x60008000, start address 0x60008000
Component class is 0x9, CoreSight component
Type is 0x15, Debug Logic, Processor
Peripheral ID[4..0] = hex 04 10 4b bc 08
Part is Cortex-A8 Debug (Debug Unit)
ROMTABLE[0x20] = 0x0
End of ROM table
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