Hi Laurent, > They are two major troubles with the Altera USB Blaster : [...] > So if you want to accelerate the Altera USB Blaster you have to queue > the commands in the API driver and then send a sequence of command to > the device. I realized that and I'm currently working on it. Also I have an idea how to implement a speed reduction (sometimes the 3 MHz provided by the blaster are too much).
> 2. This one cannot be corrected/modified in the OpenOCD source ( Blaster > hardware issues): > A debug session of a ARM or ARM Cortex processor need to have control of > SRST (System Reset) and sometimes TRST (TAP Reset). The Altera USB > Blaster do not provide these signals by default and this will be a > potential source of error when connecting to your target. Well, the blaster does have 2 unused GPIOs which can be used for this. I already implemented a command to assign these GPIOs to SRST and/or TRST including also the possibility to use inverted logic (nSRST/nTRST). > Also, the RTCK (Return Clock) is not supported by the USB Blaster. The > RTCK is really important to have on ARM7tdmi-s or the newer Cortex-A9 > (Ax) ... to name a few. The RTCK helps to synchronize the JTAG Emulator > with the target frequency. > The JTAG frequency of the Blaster is difficult to manage. It is OK for > programming a FPGA, but troubleshooting when debugging a ARM ! At the moment it seems as it will work for my Cortex-M3, everything beyond that does not bother me at the moment. I think there is a possibility to include the RTCK feature, but this would need a hardware mod to the blaster and maybe adaption of the CPLD code. But as I said, this does not bother me right now :) regards, Felix _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
