> > All these zeroes suggest either a TAP which > > legitimately has no IDCODE instruction support > > (and thus looks like IDCODE == 0) ... > > > > ... OR else hardware problems somewhere in the > > JTAG chain, possibly in some other TAP. > > > > Hello David, > I am not so sure about this. Still smells like reset > problem to me.
That could be the "hardware problems..." case. Recall that TRST (JTAG reset) is supposed to put the scan chain in a sane state -- not "all zeroes". Is TRST wired up? And configured, so OpenOCD wil use it? Or is it using the JTAG state machine entry to that state? Do you know that your chip (sometime you should post your config) handles SRST correctly (it should not affect JTAG), but you still might want to enable it. _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
