When using uint32_t in LOG_xxx functions the PRIx32 or PRId32 macros are needed
in the format string instead of x and d to compile with cygwin.
The attached patch corrects this.
>From 6ce7282be99d073f4ef9d71feda770b67eb12080 Mon Sep 17 00:00:00 2001
From: Daniel Bäder <open...@eh-oh.de>
Date: Thu, 25 Mar 2010 11:24:42 +0100
Subject: [PATCH] change %x and %d to PRIx32 and PRId32 where needed for cygwin
---
src/flash/nand/lpc3180.c | 8 ++++----
src/flash/nor/pic32mx.c | 2 +-
src/target/arm_adi_v5.c | 2 +-
src/target/arm_dpm.c | 2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index 6562e04..40324f2 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -817,7 +817,7 @@ static int lpc3180_write_page(struct nand_device *nand,
uint32_t page, uint8_t *
target_free_working_area(target,pworking_area);
- LOG_INFO("Page = 0x%x was written.",page);
+ LOG_INFO("Page = 0x%" PRIx32 " was written.",page);
}
else
@@ -1112,7 +1112,7 @@ static int lpc3180_read_page(struct nand_device *nand,
uint32_t page, uint8_t *d
target_read_memory(target, target_mem_base+DATA_OFFS, 4,
nand->page_size == 2048?512:128, page_buffer);
memcpy(data, page_buffer, data_size);
- LOG_INFO("Page = 0x%x was read.",page);
+ LOG_INFO("Page = 0x%" PRIx32 " was read.",page);
/* check hw generated ECC for each 256 bytes block with
the saved ECC in flash spare area*/
int idx = nand->page_size/0x200 ;
@@ -1120,9 +1120,9 @@ static int lpc3180_read_page(struct nand_device *nand,
uint32_t page, uint8_t *d
target_read_memory(target, target_mem_base+ECC_OFFS, 4, 8,
ecc_hw_buffer);
for(i=0;i<idx;i++){
if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+i*8)) !=
(0x00ffffff&*(uint32_t *)(ecc_flash_buffer+8+i*16)) )
- LOG_WARNING("ECC mismatch at 256 bytes size block=
%d at page= 0x%x",i*2+1,page);
+ LOG_WARNING("ECC mismatch at 256 bytes size block=
%d at page= 0x%" PRIx32,i*2+1,page);
if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+4+i*8)) !=
(0x00ffffff&*(uint32_t *)(ecc_flash_buffer+12+i*16)) )
- LOG_WARNING("ECC mismatch at 256 bytes size block=
%d at page= 0x%x",i*2+2,page);
+ LOG_WARNING("ECC mismatch at 256 bytes size block=
%d at page= 0x%" PRIx32,i*2+2,page);
}
}
diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index 36744e6..2540342 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -558,7 +558,7 @@ static int pic32mx_probe(struct flash_bank *bank)
}
}
- LOG_INFO("flash size = %dkbytes", num_pages / 1024);
+ LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
/* calculate numbers of pages */
num_pages /= page_size;
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 1b97e33..8b18fa3 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -967,7 +967,7 @@ int ahbap_debugport_init(struct adiv5_dap *dap)
retval = dap_queue_ap_read(dap, AP_REG_IDR, &idreg);
retval = dap_queue_ap_read(dap, AP_REG_BASE, &romaddr);
- LOG_DEBUG("MEM-AP #%d ID Register 0x%" PRIx32
+ LOG_DEBUG("MEM-AP #%" PRId32 " ID Register 0x%" PRIx32
", Debug ROM Address 0x%" PRIx32,
dap->apsel, idreg, romaddr);
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 8e8cc17..213afbd 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -718,7 +718,7 @@ static int dpm_bpwp_setup(struct arm_dpm *dpm, struct
dpm_bpwp *xp,
xp->control = control;
xp->dirty = true;
- LOG_DEBUG("BPWP: addr %8.8x, control %x, number %d",
+ LOG_DEBUG("BPWP: addr %8.8" PRIx32 ", control %" PRIx32 ", number %d",
xp->address, control, xp->number);
/* hardware is updated in write_dirty_registers() */
--
1.6.4.msysgit.0
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