Gentle friends,
I'm trying to understand the relationship between the
scan chain in the ARM968E core and the rest of the system scan chains in
the NXP LPC29xx family.
I've found documentation, from ARM, on the scan
chain/TAP controller for the ARM9E core family, and then from NXP there
is information on the internal scan chains required to access FLASH and
other systems peripherals. What I don't understand is the relationship
between the two. Are the internal scan chains all sitting off of one of
the ARM's unused chains? Where in the code could I start looking to
understand it?
I ask, rather than just using the LPC29xx is that I'm
trying to use a derivative of that family, the PNX8009, for which such
documentation is hard to find (even from NXP/DSPG).
Thanks,
Todd
---------------------------
Todd Krein
Director of Architecture
650-566-6657
todd.kr...@ooma.com <mailto:todd.kr...@ooma.com>
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