Hi Dimitar
I have the lastest firmware install. I have the latest openocd source from the
git repository.
I managed to build openocd. It now connects to the arm-jtag-ew but, I can't
seem to capture the processor.
It does a reset but not much of anything else. I read the note about the RTCK
mode problem but I don't know
enought about it to fix it. Also what is the error "Translation from
jtag_speed to khz not implemented" mean and
do I need to fix it?
here is my output:
Open On-Chip Debugger 0.4.0-rc1 (2010-02-03-01:04)
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
jtag_nsrst_delay: 201
jtag_ntrst_delay: 202
trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain
500 kHz
Info : ARM-JTAG-EW firmware version 1.4, hardware revision A,
SN=OL24B4C000F43EE, Additional info: Date of firmware comp
ilation: Sep 10 2009, 15:55:50, Source revision: 823
Info : U_tg = 3235 mV, U_aux = 0 mV, U_tgpwr = 5059 mV, I_tgpwr = 0 mA, D1 = 1,
Target power OK enabled
Info : ARM-JTAG-EW JTAG Interface ready
Error: Translation from jtag_speed to khz not implemented
Info : interface specific clock speed value 500
Info : JTAG tap: lpc2378.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part:
0xf1f0, ver: 0x4)
Info : Embedded ICE version 7
Error: EmbeddedICE v7 handling might be broken
Info : lpc2378.cpu: hardware has 2 breakpoints or watchpoints
thanks,
Nick
----- Original Message ----
From: Dimitar Dimitrov <dinu...@gmail.com>
To: openocd-development@lists.berlios.de
Cc: David Brownell <davi...@pacbell.net>; Xiaofan Chen <xiaof...@gmail.com>;
Nick <ndro...@rogers.com>
Sent: Tue, February 2, 2010 3:31:09 PM
Subject: Re: [Openocd-development] Olimex arm-jtag-ew and openocd
On Tuesday 02 February 2010 04:29:36 David Brownell wrote:
> On Monday 01 February 2010, Xiaofan Chen wrote:
> > I do not think libusb0.dll is the problem. It is said that arm-jtag-ew
> > emulates the J-Link in low level API. It takes quite some for
> > OpenOCD to get J-Link working properly. So I will think the
> > first support is probably done by reverse-engineering and there
> > may be something missing in the process.
Arm-jtag-ew does not emulate J-Link on the USB-level protocol because the
Jlink protocol license forbids that. Arm-jtag-ew uses its own proprietary
protocol. The compatibility with JLink is on the Jlink.DLL level.
I would suggest to make sure you have the latest firmware installed into the
device. Simply download the latest driver from olimex.com and use the included
tool to upgrade the firmware.
>
> I kind of thought that Dimitar had an "in" at Olimex ... after
> all, he had pre-release access to the USB-TINY-H adapter too!
> Given the right "in", "reverse engineering" might not be needed.
>
> Regardless, as original author of that code, I've cc'd him to be
> sure he's aware of this reported problem on MS-Windows (modulo
> problems with too-much-email-to-read-it-all).
Unfortunately I don't have hardware to test right now. I could try to help,
however, if someone posts USB comm dump, e.g. by the usbmon linux driver. Or
better yet, a dump from HW USB analyzer.
> > There are different firmware version for the J-link. They even
> > use different endpoints and supported command set are
> > not always the same. Maybe this is the case for Olimex
> > Arm-Jtag-EW as well. In that case, even if the original support
> > is good, it may not be good for yours.
>
> But the arm-jtag-ew driver isn't the same as the jlink driver...
Correct.
>
> > The first thing to check is the USB Descriptors. You can
> > post yours. Probably the original author of the patch can
> > compare yours with his.
> >
> > Under Windows, you can use usbview to post the
> > USB descriptors.
> > http://www.ftdichip.com/Resources/Utilities.htm
>
Please note that there is a known issue with RTCK mode. You can disable it
altogether (fastest), or try to configure around the arm-jtag-ew HW quirk. You
just have to take into account that is TDI delayed by 3 cycles by the arm-
jtag-ew output. A possible workaround is to introduce 3 artificial devices on
the JTAG chain with 1 bit IR lenght and 1 bit DR bypass registers. The driver
source has a comment on this issue.
Regards,
Dimitar
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