> I see what you are saying, but if the user runs the default script then the > write protection will always be removed. > > this assumes you are reseting with reset init.
Yes, but I trust the user to be smart enough to try a lot more combinations than I can imagine. Inaccurate information will appear at some point. For the record: > reset init 10 kHz JTAG tap: str710.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3) srst pulls trst - can not reset into halted mode. Issuing halt after reset. target state: halted target halted in ARM state due to debug-request, current mode: Undefined instruction cpsr: 0x000000db pc: 0x00000004 500 kHz NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'. NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'. > flash fillh 0x40000000 0xbabe 32 flash writing failed with error code: 0x101 error writing to flash at address 0x40000000 at offset 0x00000000 (-902) Command handler execution failed in procedure 'flash' called at file "command.c", line 647 called at file "command.c", line 361 > flash protect 0 0 last off cleared protection for sectors 0 through 7 on flash bank 0 > flash fillh 0x40000000 0xbabe 32 wrote 64 bytes to 0x40000000 in 0.039334s (1.589 kb/s) Running with the default configuration script: $ sudo src/openocd -f ~/workspace/openocd/tcl/interface/parport.cfg -f ~/workspace/openocd/tcl/target/str710.cfg Regards, Edgar -- Edgar Grimberg System Developer Zylin AS ZY1000 JTAG Debugger http://www.zylin.com/zy1000.html Phone: (+47) 51 63 25 00 _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
