On Tuesday 26 January 2010, Liu Hua wrote:
> Hi, I use git to download the newest OpenOCD, and compile with this
> configure" ./configure --enable-maintainer-mode ---enable-jlink"
> 
> I write the openocd.cfg like the following:
> 
> *gdb_port 3333
> telnet_port 4444
> tcl_port 6666
> 
> source [find  interface/jlink.cfg]
> 
> jtag_khz 1500
> 
> source [find board/dm355evm.cfg]*
> 
> In dm355 evm board, I set EMU0 and EMU1 both as 0 througth switch. 

I hope you mean:

# TI boards default to EMU0/EMU1 *high* -- ARM and ETB are *disabled*
# after JTAG reset until ICEpick is used to route them in.

That's what tcl/target/ti_dm355.cfg expects:  jumper "high".
If by "0" you mean "low" ... change that.


> I connect 
> a 20-pin Jlink to the board and power it up.
> 
> Then I enter command in linux: openocd
> 
> The screen displays:
> 
> *Open On-Chip Debugger 0.4.0-rc1-dev-00130-g87cb29d (2010-01-21-09:50)

Not quite the newest -- but I wouldn't think anything significant
to this issue has changed since then.

For what it's worth ... I had a DM355 EVM board hooked up last week
(or maybe the week before); it worked fine.  EMU0/EMU1 *HIGH* per
the default.


> For bug reports, read
>     http://openocd.berlios.de/doc/doxygen/bugs.html
> 1500 kHz
> RCLK - adaptive
> fast memory access is enabled
> dcc downloads are enabled
> trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
> Info : J-Link initialization started / target CPU reset initiated
> Info : J-Link ARM V6 compiled Jun 30 2009 11:04:04
> Info : JLink caps 0x99ff7bbf
> Info : JLink hw version 60000
> Info : JLink max mem block 8864
> Info : Vref = 3.196 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0
> 
> Info : J-Link JTAG Interface ready
> Info : RCLK (adaptive clock speed)
> Info : JTAG tap: dm355.jrc tap/device found: 0x2b900f0f (mfg: 0x787, part:
> 0xb900, ver: 0x2)
> Warn : JTAG tap: dm355.jrc       UNEXPECTED: 0x2b900f0f (mfg: 0x787, part:
> 0xb900, ver: 0x2)

That's the ETB ... which the config file says won't be active
until it's explicitly enabled.


> Error: JTAG tap: dm355.jrc  expected 1 of 1: 0x0b73b02f (mfg: 0x017, part:
> 0xb73b, ver: 0x0)
> Warn : Unexpected idcode after end of chain: 32 0x07926001
> Warn : Unexpected idcode after end of chain: 64 0x0b73b02f
> Error: double-check your JTAG setup (interface, speed, missing TAPs, ...)

As if ... EMU0/EMU1 were set *low* so the ETB and ARM taps were enabled
by default, despite your config file saying they were *high* so they
first needed to be enabled using the ICEpick module.


> Info : JTAG tap: dm355.jrc tap/device found: 0x2b900f0f (mfg: 0x787, part:
> 0xb900, ver: 0x2)
> Warn : JTAG tap: dm355.jrc       UNEXPECTED: 0x2b900f0f (mfg: 0x787, part:
> 0xb900, ver: 0x2)
> Error: JTAG tap: dm355.jrc  expected 1 of 1: 0x0b73b02f (mfg: 0x017, part:
> 0xb73b, ver: 0x0)
> Warn : Unexpected idcode after end of chain: 32 0x07926001

That's the ARM, which the config file says won't be active
until it's explicitly enabled.

> Warn : Unexpected idcode after end of chain: 64 0x0b73b02f

That's the ICEpick ... expected, but as the *ONLY* member of
the scan chain as you enumerate.

> Error: double-check your JTAG setup (interface, speed, missing TAPs, ...)
> Command handler execution failed
> Warn : jtag initialization failed; try 'jtag init' again.*
> 
> 
> 
> Can anyone help me? Thanks very much in advance.
> 
> Best Regards
> 
> Richard LIU
> 


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