Identical to the existing 2412/2443 support except for the base address
and NFCONF value (bit 2 is reserved and should be written as 1 ref UM).
Tested on a s3c6410 board, but controller is identical in 6400/6410
except for 8bit MLC ECC support in 6410 which isn't supported by the
driver.
Signed-off-by: Peter Korsgaard <jac...@sunsite.dk>
---
doc/openocd.texi | 3 ++-
src/flash/nand/Makefile.am | 1 +
src/flash/nand/driver.c | 2 ++
src/flash/nand/{s3c2443.c => s3c6400.c} | 28 ++++++++++++----------------
4 files changed, 17 insertions(+), 17 deletions(-)
copy src/flash/nand/{s3c2443.c => s3c6400.c} (81%)
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 0eb40b1..7d2c0a6 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5005,7 +5005,8 @@ change any behavior.
@deffnx {NAND Driver} s3c2412
@deffnx {NAND Driver} s3c2440
@deffnx {NAND Driver} s3c2443
-These S3C24xx family controllers don't have any special
+...@deffnx {NAND Driver} s3c6400
+These S3C family controllers don't have any special
@command{nand device} options, and don't define any
specialized commands.
At this writing, their drivers don't include @code{write_page}
diff --git a/src/flash/nand/Makefile.am b/src/flash/nand/Makefile.am
index 2ffa4c4..a495dfd 100644
--- a/src/flash/nand/Makefile.am
+++ b/src/flash/nand/Makefile.am
@@ -25,6 +25,7 @@ NAND_DRIVERS = \
s3c2412.c \
s3c2440.c \
s3c2443.c \
+ s3c6400.c \
at91sam9.c
noinst_HEADERS = \
diff --git a/src/flash/nand/driver.c b/src/flash/nand/driver.c
index 0e174b2..1c28dbc 100644
--- a/src/flash/nand/driver.c
+++ b/src/flash/nand/driver.c
@@ -36,6 +36,7 @@ extern struct nand_flash_controller s3c2410_nand_controller;
extern struct nand_flash_controller s3c2412_nand_controller;
extern struct nand_flash_controller s3c2440_nand_controller;
extern struct nand_flash_controller s3c2443_nand_controller;
+extern struct nand_flash_controller s3c6400_nand_controller;
extern struct nand_flash_controller imx31_nand_flash_controller;
extern struct nand_flash_controller at91sam9_nand_controller;
@@ -51,6 +52,7 @@ static struct nand_flash_controller *nand_flash_controllers[]
=
&s3c2412_nand_controller,
&s3c2440_nand_controller,
&s3c2443_nand_controller,
+ &s3c6400_nand_controller,
&imx31_nand_flash_controller,
&at91sam9_nand_controller,
/* &boundary_scan_nand_controller, */
diff --git a/src/flash/nand/s3c2443.c b/src/flash/nand/s3c6400.c
similarity index 81%
copy from src/flash/nand/s3c2443.c
copy to src/flash/nand/s3c6400.c
index d341477..20b6cc1 100644
--- a/src/flash/nand/s3c2443.c
+++ b/src/flash/nand/s3c6400.c
@@ -1,6 +1,6 @@
/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * b...@fluff.org *
+ * Copyright (C) 2010 by Peter Korsgaard <jac...@sunsite.dk> *
+ * Heavily based on s3c2412.c by Ben Dooks <b...@fluff.org> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -18,20 +18,16 @@
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
-/*
- * S3C2443 OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "s3c24xx.h"
+/* s3c64xx uses another base address for the nand controller than 24xx */
+#undef S3C2410_NFREG
+#define S3C2410_NFREG(x) ((x) + 0x70200000)
-
-NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
+NAND_DEVICE_COMMAND_HANDLER(s3c6400_nand_device_command)
{
struct s3c24xx_nand_controller *info;
CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
@@ -45,7 +41,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
return ERROR_OK;
}
-static int s3c2443_init(struct nand_device *nand)
+static int s3c6400_init(struct nand_device *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
@@ -53,7 +49,7 @@ static int s3c2443_init(struct nand_device *nand)
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
S3C2440_NFCONF_TWRPH0(7) |
- S3C2440_NFCONF_TWRPH1(7));
+ S3C2440_NFCONF_TWRPH1(7) | 4);
target_write_u32(target, S3C2440_NFCONT,
S3C2412_NFCONT_INIT_MAIN_ECC |
@@ -62,10 +58,10 @@ static int s3c2443_init(struct nand_device *nand)
return ERROR_OK;
}
-struct nand_flash_controller s3c2443_nand_controller = {
- .name = "s3c2443",
- .nand_device_command = &s3c2443_nand_device_command,
- .init = &s3c2443_init,
+struct nand_flash_controller s3c6400_nand_controller = {
+ .name = "s3c6400",
+ .nand_device_command = &s3c6400_nand_device_command,
+ .init = &s3c6400_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
--
1.6.5
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