It is a custom board but should work with other configurations to. The JTAG is
a olimex ARM-USB-TINY.
I think a better target name (target struct) is "dsp563xx" instead of "dsp56".
Am 11.12.2009 11:37, schrieb Øyvind Harboe:
> On Fri, Dec 11, 2009 at 11:31 AM, Mathias K. <kes...@freenet.de> wrote:
>> The Format things are changed but no work on doc.
>
> Also at least one target and/or board config file would be good.
>
>
>
>
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG TINY"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x0004
script dsp56321.cfg
# Script for freescale DSP56321
#
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME dsp56321
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# this defaults to a big endian
set _ENDIAN big
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x1181501d
}
# RCLK
jtag_khz 4500
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#has only srst
reset_config srst_only
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x1 -expected-id
$_CPUTAPID
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME dsp56 -endian $_ENDIAN -chain-position $_TARGETNAME
# working area at base of ram
$_TARGETNAME configure -work-area-virt 0
#flash configuration
#external flash is 3x 8bit mode MBM29LV400BC
#mapped to LOW/MID/HIGH Byte of the 24bit data bus
flash bank name cfi 0x00c00000 0x00080000 1 3 0
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