Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where
arm*20t should have used it, ARMV4_5_MCR() instead.
Basically, *writing* coprocessor registers shouldn't have
used the *read* opcode ... and both should stick to standard
opcode constructors, not rearranging parameter sequence any
more than already needed.
---
src/target/arm720t.c | 20 ++++++++++++++++----
src/target/arm920t.c | 20 ++++++++++++++++----
src/target/armv4_5.h | 12 ------------
3 files changed, 32 insertions(+), 20 deletions(-)
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -481,7 +481,10 @@ COMMAND_HANDLER(arm720t_handle_cp15_comm
return ERROR_OK;
}
-static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1,
uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm720t_mrc(struct target *target, int cpnum,
+ uint32_t op1, uint32_t op2,
+ uint32_t CRn, uint32_t CRm,
+ uint32_t *value)
{
if (cpnum!=15)
{
@@ -489,11 +492,17 @@ static int arm720t_mrc(struct target *ta
return ERROR_FAIL;
}
- return arm720t_read_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm),
value);
+ /* read "to" r0 */
+ return arm720t_read_cp15(target,
+ ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+ value);
}
-static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1,
uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm720t_mcr(struct target *target, int cpnum,
+ uint32_t op1, uint32_t op2,
+ uint32_t CRn, uint32_t CRm,
+ uint32_t value)
{
if (cpnum!=15)
{
@@ -501,7 +510,10 @@ static int arm720t_mcr(struct target *ta
return ERROR_FAIL;
}
- return arm720t_write_cp15(target, mrc_opcode(cpnum, op1, op2, CRn,
CRm), value);
+ /* write "from" r0 */
+ return arm720t_write_cp15(target,
+ ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+ value);
}
static const struct command_registration arm720t_exec_command_handlers[] = {
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -1352,7 +1352,10 @@ COMMAND_HANDLER(arm920t_handle_cache_inf
}
-static int arm920t_mrc(struct target *target, int cpnum, uint32_t op1,
uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm920t_mrc(struct target *target, int cpnum,
+ uint32_t op1, uint32_t op2,
+ uint32_t CRn, uint32_t CRm,
+ uint32_t *value)
{
if (cpnum!=15)
{
@@ -1360,10 +1363,16 @@ static int arm920t_mrc(struct target *ta
return ERROR_FAIL;
}
- return arm920t_read_cp15_interpreted(target, mrc_opcode(cpnum, op1,
op2, CRn, CRm), 0, value);
+ /* read "to" r0 */
+ return arm920t_read_cp15_interpreted(target,
+ ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+ 0, value);
}
-static int arm920t_mcr(struct target *target, int cpnum, uint32_t op1,
uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm920t_mcr(struct target *target, int cpnum,
+ uint32_t op1, uint32_t op2,
+ uint32_t CRn, uint32_t CRm,
+ uint32_t value)
{
if (cpnum!=15)
{
@@ -1371,7 +1380,10 @@ static int arm920t_mcr(struct target *ta
return ERROR_FAIL;
}
- return arm920t_write_cp15_interpreted(target, mrc_opcode(cpnum, op1,
op2, CRn, CRm), 0, value);
+ /* write "from" r0 */
+ return arm920t_write_cp15_interpreted(target,
+ ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+ 0, value);
}
static const struct command_registration arm920t_exec_command_handlers[] = {
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -379,16 +379,4 @@ extern struct reg arm_gdb_dummy_fps_reg;
*/
#define ARMV5_T_BKPT(Im) ((0xbe00 | Im) | ((0xbe00 | Im) << 16))
-/* build basic mrc/mcr opcode */
-
-static inline uint32_t mrc_opcode(int cpnum, uint32_t op1, uint32_t op2,
uint32_t CRn, uint32_t CRm)
-{
- uint32_t t = 0;
- t|=op1<<21;
- t|=op2<<5;
- t|=CRn<<16;
- t|=CRm<<0;
- return t;
-}
-
#endif /* ARMV4_5_H */
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