Hi, I am using OpenOCD version 0.3.1, connected to STM32 target and the "default" configuration script. The STM32 flash is blank. If I try to "reset halt", I find the state of the CPU to be Handler HardFault:
> reset halt JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) target state: halted target halted due to debug-request, current mode: Handler HardFault xPSR: 0x1000003 pc: 0x55555554 msp: 0x55555534 At this point, all operations will fail: > mdw 0 AHBAP Cached values: dp_select 0x0, ap_csw 0xa2000012, ap_tar 0xffffffff SWJ-DP STICKY ERROR Read MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x4 AHBAP Cached values: dp_select 0x0, ap_csw 0xa2000012, ap_tar 0xffffffff SWJ-DP STICKY ERROR Read MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x4 Block read error address 0x0, count 0x1 Runtime error, file "command.c", line 473: This makes the erased STM32 board to be a nice brick. The log for reset is: Debug: 349 708770 log.c:483 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (2750). This may cause trouble with GDB connections. Debug: 352 743030 command.c:68 script_debug(): command - reset Debug: 353 743040 command.c:77 script_debug(): reset - argv[0]=ocd_reset Debug: 354 743050 command.c:77 script_debug(): reset - argv[1]=halt Debug: 355 743060 target.c:4515 jim_target(): Target command params: Debug: 356 743060 target.c:4516 jim_target(): target names Debug: 357 743080 core.c:1465 jtag_init_reset(): Initializing with hard TRST+SRST reset Debug: 358 743080 zy1000.c:131 zy1000_reset(): zy1000 trst=1, srst=0 Debug: 359 743090 core.c:722 jtag_add_reset(): TRST line asserted Debug: 360 743100 zy1000.c:131 zy1000_reset(): zy1000 trst=1, srst=1 Debug: 361 743100 core.c:697 jtag_add_reset(): SRST line asserted Debug: 362 743110 zy1000.c:131 zy1000_reset(): zy1000 trst=0, srst=1 Debug: 363 743110 core.c:727 jtag_add_reset(): TRST line released Debug: 364 743220 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 365 743230 zy1000.c:131 zy1000_reset(): zy1000 trst=0, srst=0 Debug: 366 743240 core.c:702 jtag_add_reset(): SRST line released Debug: 367 743340 core.c:1378 jtag_init_inner(): Init JTAG chain Debug: 368 743350 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 369 743350 core.c:1039 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 370 743360 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Info : 371 743370 core.c:948 jtag_examine_chain_display(): JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) Info : 372 743380 core.c:948 jtag_examine_chain_display(): JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) Debug: 373 743400 core.c:1204 jtag_validate_ircapture(): IR capture validation scan Debug: 374 743400 core.c:1257 jtag_validate_ircapture(): stm32.cpu: IR capture 0x01 Debug: 375 743410 core.c:1257 jtag_validate_ircapture(): stm32.bs: IR capture 0x01 Debug: 376 743420 arm_adi_v5.c:960 ahbap_debugport_init(): Debug: 377 743430 arm_adi_v5.c:1005 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003 Debug: 378 743440 cortex_m3.c:708 cortex_m3_assert_reset(): target->state: halted Debug: 379 743450 zy1000.c:131 zy1000_reset(): zy1000 trst=0, srst=1 Debug: 380 743460 core.c:697 jtag_add_reset(): SRST line asserted Debug: 381 743510 cortex_m3.c:469 cortex_m3_halt(): target->state: reset Debug: 382 743520 cortex_m3.c:841 cortex_m3_deassert_reset(): target->state: reset Debug: 383 743530 zy1000.c:131 zy1000_reset(): zy1000 trst=0, srst=0 Debug: 385 743540 core.c:702 jtag_add_reset(): SRST line released Debug: 386 743650 cortex_m3.c:422 cortex_m3_poll(): Exit from reset with dcb_dhcsr 0x30003 Debug: 387 743660 cortex_m3.c:189 cortex_m3_endreset_event(): DCB_DEMCR = 0x01000501 Debug: 388 743670 target.c:1560 target_write_u32(): address: 0xe0002000, value: 0x00000003 Debug: 389 743670 target.c:1560 target_write_u32(): address: 0xe0002008, value: 0x00000000 Debug: 390 743680 target.c:1560 target_write_u32(): address: 0xe000200c, value: 0x00000000 Debug: 391 743690 target.c:1560 target_write_u32(): address: 0xe0002010, value: 0x00000000 Debug: 392 743700 target.c:1560 target_write_u32(): address: 0xe0002014, value: 0x00000000 Debug: 393 743710 target.c:1560 target_write_u32(): address: 0xe0002018, value: 0x00000000 Debug: 394 743720 target.c:1560 target_write_u32(): address: 0xe000201c, value: 0x00000000 Debug: 395 743720 target.c:1560 target_write_u32(): address: 0xe0002020, value: 0x00000000 Debug: 396 743730 target.c:1560 target_write_u32(): address: 0xe0002024, value: 0x00000000 Debug: 397 743740 target.c:1560 target_write_u32(): address: 0xe0001020, value: 0x00000000 Debug: 398 743750 target.c:1560 target_write_u32(): address: 0xe0001024, value: 0x00000000 Debug: 399 743760 target.c:1560 target_write_u32(): address: 0xe0001028, value: 0x00000000 Debug: 400 743770 target.c:1560 target_write_u32(): address: 0xe0001030, value: 0x00000000 Debug: 401 743770 target.c:1560 target_write_u32(): address: 0xe0001034, value: 0x00000000 Debug: 402 743780 target.c:1560 target_write_u32(): address: 0xe0001038, value: 0x00000000 Debug: 403 743790 target.c:1560 target_write_u32(): address: 0xe0001040, value: 0x00000000 Debug: 404 743800 target.c:1560 target_write_u32(): address: 0xe0001044, value: 0x00000000 Debug: 405 743810 target.c:1560 target_write_u32(): address: 0xe0001048, value: 0x00000000 Debug: 406 743810 target.c:1560 target_write_u32(): address: 0xe0001050, value: 0x00000000 Debug: 407 743820 target.c:1560 target_write_u32(): address: 0xe0001054, value: 0x00000000 Debug: 408 743830 target.c:1560 target_write_u32(): address: 0xe0001058, value: 0x00000000 Debug: 409 743840 cortex_m3.c:324 cortex_m3_debug_entry(): Debug: 410 743850 cortex_m3.c:147 cortex_m3_clear_halt(): NVIC_DFSR 0x9 Debug: 411 743860 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0xffff7ffc Debug: 412 743860 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xffffffff Debug: 413 743870 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0x79b277c6 Debug: 414 743880 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x57cc1d9b Debug: 415 743890 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0xfbbfdae6 Debug: 416 743900 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x42c5fff9 Debug: 417 743910 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x6afa6ef7 Debug: 418 743920 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0xece0697b Debug: 419 743930 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0xf7ffffdd Debug: 420 743940 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0xf7ffffff Debug: 421 743950 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x6e5e7d89 Debug: 422 743960 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x7ece6bd7 Debug: 423 743970 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0xffffcfff Debug: 424 743980 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0x55555534 Debug: 425 743990 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xfffffff9 Debug: 426 744000 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0x55555554 Debug: 427 744010 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x1000003 Debug: 428 744020 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0x55555534 Debug: 429 744030 cortex_m3.c:1236 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0xca59d7c8 Debug: 430 744040 cortex_m3.c:1268 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0 Debug: 431 744050 cortex_m3.c:1268 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0 Debug: 432 744060 cortex_m3.c:1268 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0 Debug: 433 744070 cortex_m3.c:1268 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0 Debug: 434 744080 cortex_m3.c:309 cortex_m3_examine_exception_reason(): HardFault SHCSR 0x20000, SR 0x40000000, CFSR 0x1001, AR 0xffffffff Debug: 435 744090 cortex_m3.c:381 cortex_m3_debug_entry(): entered debug state in core mode: Handler at PC 0x55555554, target->state: halted Debug: 436 744100 target.c:950 target_call_event_callbacks(): target event 4 (gdb-halt) Debug: 437 744110 target.c:950 target_call_event_callbacks(): target event 5 (halted) User : 438 744110 target.c:1229 target_arch_state(): target state: halted User : 439 744120 armv7m.c:496 armv7m_arch_state(): target halted due to debug-request, current mode: Handler HardFault xPSR: 0x1000003 pc: 0x55555554 msp: 0x55555534 The log for mdw 0 : Debug: 584 1027840 command.c:68 script_debug(): command - mdw Debug: 585 1027840 command.c:77 script_debug(): mdw - argv[0]=ocd_mdw Debug: 586 1027850 command.c:77 script_debug(): mdw - argv[1]=0 Debug: 587 1027860 arm_adi_v5.c:243 swjdp_transaction_endcheck(): swjdp: CTRL/STAT error 0xf0000021 Error: 588 1027870 arm_adi_v5.c:254 swjdp_transaction_endcheck(): AHBAP Cached values: dp_select 0x0, ap_csw 0xa2000012, ap_tar 0xffffffff Error: 589 1027880 arm_adi_v5.c:259 swjdp_transaction_endcheck(): SWJ-DP STICKY ERROR Debug: 590 1027890 arm_adi_v5.c:267 swjdp_transaction_endcheck(): swjdp: status 0xf0000001 Error: 591 1027900 arm_adi_v5.c:273 swjdp_transaction_endcheck(): Read MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x4 Debug: 592 1027910 arm_adi_v5.c:243 swjdp_transaction_endcheck(): swjdp: CTRL/STAT error 0xf0000021 Error: 593 1027920 arm_adi_v5.c:254 swjdp_transaction_endcheck(): AHBAP Cached values: dp_select 0x0, ap_csw 0xa2000012, ap_tar 0xffffffff Error: 594 1027930 arm_adi_v5.c:259 swjdp_transaction_endcheck(): SWJ-DP STICKY ERROR Debug: 595 1027940 arm_adi_v5.c:267 swjdp_transaction_endcheck(): swjdp: status 0xf0000001 Error: 596 1027950 arm_adi_v5.c:273 swjdp_transaction_endcheck(): Read MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x4 Warn : 597 1027960 arm_adi_v5.c:759 mem_ap_read_buf_u32(): Block read error address 0x0, count 0x1 Debug: 598 1027970 command.c:444 run_command(): Command failed with error code -107 User : 599 1027980 command.c:646 openocd_jim_vfprintf(): Runtime error, file "command.c", line 473: User : 600 1027990 command.c:646 openocd_jim_vfprintf(): Regards, Edgar -- Edgar Grimberg System Developer Zylin AS ZY1000 JTAG Debugger http://www.zylin.com/zy1000.html Phone: (+47) 51 63 25 00 _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development