I'm posting this as an preview of some work that's not yet complete,
in case someone has insightful comments they want to share...

It's actually two things:

  - ARM "Debug Programmer's Model" (DPM) for ARMv6/ARMv7 cores
    (but not the M profiles, Cortex-M cores).  Basically the
    debug interface is now architectural, so a certain level of
    code shareability is guaranteed.

    I think this stuff might as well merge ASAP, unless there's
    some issue with the concept.  It can't break anything until
    it gets used, after all!

     * DPM interface, and support for register access.  We can
       eventually share breakpoint and watchpoint code too.

     * ARM11 support.  This is an extremely thin layer over
       the current Debug TAP interface.  Cortex-A8 support
       will be easy too.  (But needs at least one minor tweak
       to the interface.)

  - Make ARM11 use that stuff ... so it can work better (with
    support for different core modes and states), reuse lots of
    standard code, and support more standard interfaces.

    This is a significant overhaul, so I don't plan to put
    most of it back until I resolve one issue (see below).

    There's no overall solution for partial/incremental merge
    either, since intermediate steps necessarily leave some
    key loose ends.  Or so it looks to me...

     * Add a _second_ register cache to ARM11, covering all
       standard registers.  Gives access to e.g. FIQ shadows.
       (Loose end:  the previous stuff is still used along
       various code paths!)  "arm reg" works, etc.

     * Use standard single step code, not custom ARM11 glue.
       Just simplification; removes one code path that still
       used the old register set, and one expects Thumb will
       now behave.

     * Use standard V4/V5 run_algorithm(), not a trimmed-down
       subset.  ISSUE:  doesn't quite work, not sure why yet.
       ("flash erase_check" misbehaved, but at least one of
       the bugs seems to lie outside the ARM11 code.)

     * Remove "history" mechanism.  It's only for debug help,
       and if it's desirable it should be done for *ALL* cores.
       (This could actually be removed before any of these
       patches merge.)

     * Remove most of that original register cache, and switch
       to the DPM primitives for the tasks it handled.  Only a
       few debug registers are left (for now).

So I expect to merge the two "add DPM" patches and the "remove
histor mechanism" patch by tomorrow, unless somone has a good
counter-argument, and continue to chase down the breakage I
see in the "flash erase_check" code.

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