On Monday 19 October 2009, michal smulski wrote: > The same sequence works on my arm1136. However, when you put a scope to > SRST signal you will find out that it is actually high (ie not > asserted). At least this is what I found on my setup (with olimex)
At what point are you putting the scope there ... while SRST is supposed to be held high via "jtag_reset"? Or during a sequence like "reset halt" on an ARM11? I have an Olimex "Tiny", and have no reason to believe that SRST isn't working there... to the contrary, with one board where resets were malfunctioning, I used "jtag_reset" to force SRST active and *OBSERVED IT* being active (low) next to the JTAG connector. The problem in that case proved to be that the nSRST signal got routed through a CPLD, which promptly ignored it when deciding whether to issue a reset to the CPU. Power-up, yes that matters; reset button; yes; nSRST via JTAG, ignored. :( Now if you suggest the same thing is true (nSRST vanishing on the way to the CPU) on that fairly complex ARM11 board stack, I can try to verify that. I *think* I have schematics for that revision of the CPU card ... but I'd be surprised if such a bug made it through several dozen revisions of that card (and the chips found on it). Øyvind pointed out that the arm11 reset logic was not currently issuing nSRST. So that would affect certain experiments ... but not one that went straight to the JTAG layer to activate SRST. - Dave > On Tue, 2009-10-13 at 23:07 -0700, David Brownell wrote: > > On Tuesday 13 October 2009, michal smulski wrote: > > > arm11 has a bug in that you cannot at the same time assert srst to the > > > arm11 core and access its JTAG logic. Asserting srst will disable TAP > > > logic. > > > > Maybe *some* processors do, but I just fired up an OMAP2420 > > and found that it's not true: > > > > jtag_reset 1 1 > > jtag_reset 0 1 > > jtag arp_init > > ... all the scan chain checks work, three active TAPs > > > > That's an arm1136 based core. The active taps were an ICEpick-B, > > the ARM1136, an ETB ... so at the JTAG level there seem to be no > > issues like that. > > > > > > On Tuesday 13 October 2009, Øyvind Harboe wrote: > > > Can someone help me explain what the effects of asserting > > > srst on an arm11 is? > > > > On that chip, it just keeps parts of the system in reset, > > while leaving the TAP alone. This isn't a new part at all; > > I think this particular board is almost three years old. > > > > > > > Does anyone know how to safely reset an arm11 into the > > > halted state? > > > > Well it *said* that it halted fine after "reset halt". > > And it acted OK then too; "flash probe" worked etc. > > > > So I'd think the current code is behaving, modulo issues > > you might have with iMX31 ... > > > > - Dave > > _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
