On Wednesday 16 September 2009, Øyvind Harboe wrote:
> --- src/target/arm7_9_common.c (revision 2714)
> +++ src/target/arm7_9_common.c (working copy)
> @@ -1021,6 +1021,17 @@
> return ERROR_FAIL;
> }
>
> + /* at this point trst has been asserted/deasserted once. We want to
> + * program embedded ice while SRST is asserted, but some CPUs gate
> + * the JTAG clock while SRST is asserted
> + */
> + bool srst_asserted = false;
> + if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) &&
> ((jtag_reset_config & RESET_SRST_GATES_JTAG) == 0))
In short, *change the default* to assume JTAG is available during SRST.
I suspect the default should get reverted before 0.3 ships. It's
easy to see how chips might *not* have a clock available with SRST
active ... and I know that many of them are explicit about needing
time to stabilize clocks after reset, so even if it's available it
may not work well for non-adaptive JTAG clocking.
In fact, I need to go back and verify ... but disabling that check
seemed to make one board work again. I suspect this change will
cause a lot of subtle *avoidable* breakage.
Any objection if I restore the previous default, while still
ensuring that the "reset_config" command can control this?
- Dave
> + {
> + jtag_add_reset(0, 1);
> + srst_asserted = true;
> + }
> +
> if (target->reset_halt)
> {
> /*
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