On Tue, Sep 15, 2009 at 09:15:34AM +0200, Øyvind Harboe wrote: > On Mon, Sep 14, 2009 at 10:08 PM, Johannes Stezenbach <j...@sig21.net> wrote: > > > > I thought the desired reset procedure at least on ARM9 is: > > > > - pull SRST and TRST (TRST not only resets the TAP but also EmbeddedICE) > > - release TRST > > - program EmbeddedICE to break on reset vector > > - release SRST > > To optionally program arm7/9 if srst does not gate the JTAG clock is > a possible improvement, but I'm not sure why it would be better to > program EmbeddedICE to break on reset vector while srst > is asserted. > > What would that achieve as oposed to first programming the > break on reset and afterwards asserting/deasserting srst?
I once managed to flash a wrong boot loader, which caused the system to hang completely (including JTAG) due to wrong clock programming. Sometimes you need to prevent the system from executing any code. Johannes _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
