The attached patch reduces ARM11 output noise(bogus errors & warnings)
when there is no IDCODE upon JTAG chain examine + evaluation.
--
Øyvind Harboe
Embedded software and hardware consulting services
http://www.zylin.com
### Eclipse Workspace Patch 1.0
#P openocd
Index: src/jtag/jtag.h
===================================================================
--- src/jtag/jtag.h (revision 2625)
+++ src/jtag/jtag.h (working copy)
@@ -144,7 +144,7 @@
/* this is really: typedef jtag_tap_t */
/* But - the typedef is done in "types.h" */
-/* due to "forward decloration reasons" */
+/* due to "forward declaration reasons" */
struct jtag_tap_s
{
const char* chip;
@@ -161,6 +161,7 @@
uint32_t ir_capture_mask;
uint8_t* expected_mask; /**< Capture-IR expected mask */
uint32_t idcode;
+ bool hasidcode; /* not all devices have idcode, we'll discover this
during chain examination */
/**< device identification code */
/// Array of expected identification codes */
Index: src/jtag/core.c
===================================================================
--- src/jtag/core.c (revision 2625)
+++ src/jtag/core.c (working copy)
@@ -939,7 +939,7 @@
/* If none of the expected ids matched, log an error */
if (ii != tap->expected_ids_cnt)
{
- LOG_INFO("JTAG Tap/device matched");
+ LOG_DEBUG("JTAG Tap/device matched");
return true;
}
jtag_examine_chain_display(LOG_LVL_ERROR, "got",
@@ -978,11 +978,13 @@
for (unsigned bit_count = 0; bit_count < (JTAG_MAX_CHAIN_SIZE * 32) -
31;)
{
uint32_t idcode = buf_get_u32(idcode_buffer, bit_count, 32);
+ tap->hasidcode = true;
if ((idcode & 1) == 0)
{
/* LSB must not be 0, this indicates a device in bypass
*/
LOG_WARNING("Tap/Device does not have IDCODE");
idcode = 0;
+ tap->hasidcode = false;
bit_count += 1;
}
@@ -1074,7 +1076,8 @@
}
val = buf_get_u32(ir_test, chain_pos, 2);
- if (val != 0x1)
+ /* Only fail this check if we have IDCODE for this device */
+ if ((val != 0x1)&&(tap->hasidcode))
{
char *cbuf = buf_to_str(ir_test, total_ir_length, 16);
LOG_ERROR("Could not validate JTAG scan chain, IR
mismatch, scan returned 0x%s. tap=%s pos=%d expected 0x1 got %0x", cbuf,
jtag_tap_name(tap), chain_pos, val);
Index: TODO
===================================================================
--- TODO (revision 2625)
+++ TODO (working copy)
@@ -117,7 +117,10 @@
- ARM923EJS:
- reset run/halt/step is not robust; needs testing to map out problems.
- ARM11 improvements (MB?)
- - fix single stepping (reported by ØH)
+ - fix single stepping (reported by ØH). Michael Bruck explained
+ that what's required is to emulate the current instruction(just like the
+ arm7 code) to know what address to set the breakpoint at for single
+ stepping an instruction.
- implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
- Cortex A8 support (ML)
- add target implementation (ML)
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