On Tuesday 18 August 2009, Piotr Ziecik wrote:
> Due to errors in chipselect management in davinci_nand driver
> OpenOCD was able to access only to chips attached to first EMIF
> chipselect. This patch fixes chipselect management code and allows
> OpenOCD to access to NAND devices attached to any EMIF CS line.
>
> Signed-off-by: Piotr Ziecik <ko...@semihalf.com>
Acked-by: David Brownell <dbrown...@users.sourceforge.net>
> ---
> src/flash/davinci_nand.c | 6 +++---
> 1 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/flash/davinci_nand.c b/src/flash/davinci_nand.c
> index 8d2d7e9..ffd3560 100644
> --- a/src/flash/davinci_nand.c
> +++ b/src/flash/davinci_nand.c
> @@ -365,7 +365,7 @@ static int davinci_write_page_ecc1(struct nand_device_s
> *nand, uint32_t page,
> struct davinci_nand *info = nand->controller_priv;
> target_t *target = info->target;
> const uint32_t fcr_addr = info->aemif + NANDFCR;
> - const uint32_t ecc1_addr = info->aemif + NANDFECC + info->chipsel;
> + const uint32_t ecc1_addr = info->aemif + NANDFECC + (4 * info->chipsel);
> uint32_t fcr, ecc1;
>
> /* Write contiguous ECC bytes starting at specified offset.
> @@ -676,11 +676,11 @@ static int davinci_nand_device_command(struct
> command_context_s *cmd_ctx,
> || aemif == 0x01e10000 /* dm335, dm355 */
> || aemif == 0x01d10000 /* dm365 */
> ) {
> - if (chip < 0x0200000 || chip >= 0x0a000000) {
> + if (chip < 0x02000000 || chip >= 0x0a000000) {
> LOG_ERROR("NAND address %08lx out of range?", chip);
> goto fail;
> }
> - chipsel = (chip - 0x02000000) >> 21;
> + chipsel = (chip - 0x02000000) >> 25;
> } else {
> LOG_ERROR("unrecognized AEMIF controller address %08lx", aemif);
> goto fail;
> --
> 1.6.4
>
> _______________________________________________
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> Openocd-development@lists.berlios.de
> https://lists.berlios.de/mailman/listinfo/openocd-development
>
>
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