Great catch! The attached patch incorporates these changes and will be
committed soon.
--Z
On Tue, 2009-08-04 at 11:14 -0700, michal smulski wrote:
> And here is the bug to get 'flash probe 0' working (arm11.c,
> arm11_write_memory():
>
> -memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t));
> +memcpy(&value, buffer + i * sizeof(uint16_t), sizeof(uint16_t));
>
> --Michal
>
>
>
> On Tue, 2009-08-04 at 11:06 -0700, michal smulski wrote:
> > The bug is as follows (arm11.c):
> > -memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t));
> > +memcpy(buffer + i * sizeof(uint16_t), &svalue, sizeof(uint16_t));
> >
> >
> > --Michal
> >
> > On Mon, 2009-08-03 at 15:45 -0700, michal smulski wrote:
> > > Little-endian mode. I can correctly access the ARM11 core via MAJIC JTAG
> > > interface and Mentor's software. Only Olimex/openocd is giving me
> > > trouble with 16-bit access.
> > >
> > > I tried to configure openocd with big-endian but I get the same results
> > > (32bit & 8bit work, 16bit return always 0x0000)
> > >
> > > Attached is my config file.
> > > --Michal
> > >
> > > On Tue, 2009-08-04 at 00:08 +0200, Michael Schwingen wrote:
> > > > michal smulski wrote:
> > > > > I am using C100 (Mindspeed ARM11 dual core). I can correctly access
> > > > > DDR2 and 16 bit flash on it via 8-bit and 32-bit commands (mdb,mdw)
> > > > > but
> > > > > not 16-bit access.
> > > > Are you running it in big or little endian mode?
> > > >
> > > > I did some work on that CPU some time ago, and ran into problems because
> > > > there were some issues regarding big-endian support (I was using a
> > > > BDI2000 at that time, not OpenOCD).
> > > >
> > > > I did not get to dig much deeper, because the project was cancelled, and
> > > > there were some documentation updates later, so maybe this was just a
> > > > documentation issue.
> > > >
> > > > cu
> > > > Michael
> > > >
> > > > _______________________________________________
> > > > Openocd-development mailing list
> > > > Openocd-development@lists.berlios.de
> > > > https://lists.berlios.de/mailman/listinfo/openocd-development
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> > > Openocd-development@lists.berlios.de
> > > https://lists.berlios.de/mailman/listinfo/openocd-development
> >
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>
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Fix ARM11 half-word bulk memory read and write.
---
arm11.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
======
only in patch2:
unchanged:
--- src/target/arm11.c (revision 2571)
+++ src/target/arm11.c (working copy)
@@ -1149,7 +1149,7 @@
arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
uint16_t svalue = res;
- memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t));
+ memcpy(buffer + i * sizeof(uint16_t), &svalue, sizeof(uint16_t));
}
break;
@@ -1219,7 +1219,7 @@
for (size_t i = 0; i < count; i++)
{
uint16_t value;
- memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t));
+ memcpy(&value, buffer + i * sizeof(uint16_t), sizeof(uint16_t));
/* MRC p14,0,r1,c0,c5,0 */
arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
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