I had this problem before , but to see if I could shake it out, I did
the following things
1) Switch hardware JTAG debugger from olimex ARM-USB-TINY to Segger/IAR Jlink
2) Rebuild pretty much the latest posible version of openocd svn2459.
But my problem still exists.
I need the ability to use at least one hardware breakpoint.
If I have a main program blinky.c that does the "hardware hello world
routine" of
blinking an LED, with an infinite loop with a delay loop inside it to pace the
toggling of the LED, and I put the break point outside of the delay
loop, right upon
the line of code that blinks the led. This should allow me to
stop/break at each toggle
point of the LED.
// Breakpoint set at line 24:
// 22: while (1)
// 23: {
// 24: LED_PORT_DATA ^= LED_PIN; // Toggle LED
// 25: delay(DELAY_COUNT); // Wait...
// 26: }
Instead this does not work, the breakpoint there looks invisible to the debugger
gdb/open ocd, and the program free runs.
But... I can stop the free running program in gdb with a control c.
Then if I tell gdb to jump to the first line of my (normally one time
execution startup
code) , then it is able to continue and halt at the occurrence of the
desired breakpoint,
showing that this breakpoint has not been cancelled or erased.
So what is going on ?
Here is an interspersed record of debug from open OCD and what I entered
and saw with gdb:
//^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
//=======================
// Start of openOCD svn2459, compiled for jlink debugger only
// This was done to be sure that problem was not just with ARM-USB-TINY
// debugger. , gdb is started below at next comment section
//=======================
Debug: 10 15 configuration.c:83 find_file(): found Eagle100_Jlink-setup.cfg
Debug: 12 15 command.c:68 script_debug(): command - interface
Debug: 13 15 command.c:77 script_debug(): interface - argv[0]=ocd_interface
Debug: 14 15 command.c:77 script_debug(): interface - argv[1]=jlink
Debug: 16 15 command.c:68 script_debug(): command - jtag_khz
Debug: 17 15 command.c:77 script_debug(): jtag_khz - argv[0]=ocd_jtag_khz
Debug: 18 15 command.c:77 script_debug(): jtag_khz - argv[1]=500
Debug: 19 15 core.c:1268 jtag_config_khz(): handle jtag khz
User : 20 15 command.c:396 command_print(): 500 kHz
Debug: 22 15 command.c:68 script_debug(): command - jtag_nsrst_delay
Debug: 23 15 command.c:77 script_debug(): jtag_nsrst_delay -
argv[0]=ocd_jtag_nsrst_delay
Debug: 24 15 command.c:77 script_debug(): jtag_nsrst_delay - argv[1]=100
User : 25 15 command.c:396 command_print(): jtag_nsrst_delay: 100
Debug: 27 15 command.c:68 script_debug(): command - jtag_ntrst_delay
Debug: 28 15 command.c:77 script_debug(): jtag_ntrst_delay -
argv[0]=ocd_jtag_ntrst_delay
Debug: 29 15 command.c:77 script_debug(): jtag_ntrst_delay - argv[1]=100
User : 30 15 command.c:396 command_print(): jtag_ntrst_delay: 100
Debug: 32 15 command.c:68 script_debug(): command - reset_config
Debug: 33 15 command.c:77 script_debug(): reset_config -
argv[0]=ocd_reset_config
Debug: 34 15 command.c:77 script_debug(): reset_config - argv[1]=srst_only
Debug: 35 15 tcl.c:237 jim_newtap_cmd(): Creating New Tap, Chip:
lm3s6918, Tap: cpu, Dotted: lm3s6918.cpu, 8 params
Debug: 36 15 tcl.c:253 jim_newtap_cmd(): Processing option: -irlen
Debug: 37 15 tcl.c:253 jim_newtap_cmd(): Processing option: -ircapture
Debug: 38 15 tcl.c:253 jim_newtap_cmd(): Processing option: -irmask
Debug: 39 15 tcl.c:253 jim_newtap_cmd(): Processing option: -expected-id
Debug: 40 15 core.c:1116 jtag_tap_init(): Created Tap: lm3s6918.cpu @
abs position 0, irlen 4, capture: 0x1 mask: 0xf
Debug: 41 15 target.c:4292 jim_target(): Target command params:
Debug: 42 15 target.c:4293 jim_target(): target create lm3s6918.cpu
cortex_m3 -endian little -chain-position lm3s6918.cpu -variant lm3s
Debug: 44 15 command.c:68 script_debug(): command - bank
Debug: 45 15 command.c:77 script_debug(): bank - argv[0]=ocd_flash_bank
Debug: 46 15 command.c:77 script_debug(): bank - argv[1]=stellaris
Debug: 47 15 command.c:77 script_debug(): bank - argv[2]=0
Debug: 48 15 command.c:77 script_debug(): bank - argv[3]=0
Debug: 49 15 command.c:77 script_debug(): bank - argv[4]=0
Debug: 50 15 command.c:77 script_debug(): bank - argv[5]=0
Debug: 51 15 command.c:77 script_debug(): bank - argv[6]=0
Debug: 53 15 command.c:68 script_debug(): command - gdb_memory_map
Debug: 54 15 command.c:77 script_debug(): gdb_memory_map -
argv[0]=ocd_gdb_memory_map
Debug: 55 15 command.c:77 script_debug(): gdb_memory_map - argv[1]=enable
Debug: 56 31 configuration.c:83 find_file(): found DebugPgm.cfg
Debug: 58 31 command.c:68 script_debug(): command - telnet_port
Debug: 59 31 command.c:77 script_debug(): telnet_port - argv[0]=ocd_telnet_port
Debug: 60 31 command.c:77 script_debug(): telnet_port - argv[1]=4444
Debug: 62 31 command.c:68 script_debug(): command - gdb_port
Debug: 63 31 command.c:77 script_debug(): gdb_port - argv[0]=ocd_gdb_port
Debug: 64 31 command.c:77 script_debug(): gdb_port - argv[1]=3333
Debug: 66 31 command.c:68 script_debug(): command - init
Debug: 67 31 command.c:77 script_debug(): init - argv[0]=ocd_init
Debug: 68 31 openocd.c:129 handle_init_command(): target init complete
Debug: 69 47 jlink.c:881 jlink_usb_open(): usb ep in 81
Debug: 70 47 jlink.c:881 jlink_usb_open(): usb ep out 02
Info : 71 78 jlink.c:579 jlink_get_version_info(): J-Link ARM V6
compiled Apr 1 2009 11:56:10
Info : 72 78 jlink.c:592 jlink_get_version_info(): JLink caps 0x19ff7bbf
Info : 73 78 jlink.c:611 jlink_get_version_info(): JLink hw version 60000
Info : 74 78 jlink.c:627 jlink_get_version_info(): JLink max mem block 8832
Info : 75 78 jlink.c:540 jlink_get_status(): Vref = 3.274 TCK = 1 TDI
= 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1
Info : 76 78 jlink.c:338 jlink_init(): J-Link JTAG Interface ready
Debug: 77 78 jlink.c:483 jlink_reset(): trst: 0, srst: 0
Debug: 78 109 openocd.c:136 handle_init_command(): jtag interface init complete
Debug: 79 109 core.c:1161 jtag_init_inner(): Init JTAG chain
Debug: 80 109 core.c:291 jtag_call_event_callbacks(): jtag event: JTAG
controller reset (RESET or TRST)
Debug: 81 109 core.c:807 jtag_reset_callback(): -
Info : 82 109 core.c:874 jtag_examine_chain_display(): JTAG tap:
lm3s6918.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00,
ver: 0x3)
Info : 83 109 core.c:933 jtag_examine_chain_match_tap(): JTAG Tap/device matched
Debug: 84 109 openocd.c:142 handle_init_command(): jtag init complete
Debug: 85 109 arm_adi_v5.c:960 ahbap_debugport_init():
Debug: 86 125 arm_adi_v5.c:1005 ahbap_debugport_init(): AHB-AP ID
Register 0x14770011, Debug ROM Address 0xe00ff003
Debug: 87 125 target.c:1342 target_read_u32(): address: 0xe000ed00,
value: 0x411fc231
Debug: 88 125 cortex_m3.c:1467 cortex_m3_examine(): CORTEX-M3 processor detected
Debug: 89 125 cortex_m3.c:1468 cortex_m3_examine(): cpuid: 0x411fc231
Debug: 90 125 target.c:1342 target_read_u32(): address: 0xe000e004,
value: 0x00000001
Debug: 91 125 target.c:1342 target_read_u32(): address: 0xe000e100,
value: 0x00000000
Debug: 92 125 cortex_m3.c:1476 cortex_m3_examine(): interrupt
enable[0] = 0x00000000
Debug: 93 140 target.c:1342 target_read_u32(): address: 0xe000e104,
value: 0x00000000
Debug: 94 140 cortex_m3.c:1476 cortex_m3_examine(): interrupt
enable[1] = 0x00000000
Debug: 95 140 target.c:1342 target_read_u32(): address: 0xe0002000,
value: 0x00000260
Debug: 96 140 cortex_m3.c:1492 cortex_m3_examine(): FPB fpcr 0x260,
numcode 6, numlit 2
Debug: 97 140 target.c:1342 target_read_u32(): address: 0xe0001000,
value: 0x40000000
Debug: 98 140 openocd.c:145 handle_init_command(): jtag examine complete
Debug: 99 140 openocd.c:151 handle_init_command(): flash init complete
Debug: 100 140 openocd.c:155 handle_init_command(): mflash init complete
Debug: 101 140 openocd.c:159 handle_init_command(): NAND init complete
Debug: 102 140 openocd.c:163 handle_init_command(): pld init complete
Debug: 103 156 gdb_server.c:2236 gdb_init(): gdb service for target
cortex_m3 at port 3333
Debug: 105 156 command.c:68 script_debug(): command - reset
Debug: 106 156 command.c:77 script_debug(): reset - argv[0]=ocd_reset
Debug: 107 156 target.c:4292 jim_target(): Target command params:
Debug: 108 156 target.c:4293 jim_target(): target names
Debug: 109 156 target.c:3411 target_handle_event(): event: 11
reset-start - no action
Debug: 110 156 core.c:1208 jtag_init_reset(): Trying to bring the JTAG
controller to life by asserting TRST / RESET
Debug: 111 156 jlink.c:483 jlink_reset(): trst: 0, srst: 0
Debug: 112 171 core.c:653 jtag_add_reset(): SRST line released
Debug: 113 171 core.c:660 jtag_add_reset(): JTAG reset with RESET
instead of TRST
Debug: 114 171 core.c:291 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 115 171 core.c:807 jtag_reset_callback(): -
Debug: 116 327 jlink.c:483 jlink_reset(): trst: 0, srst: 1
Debug: 117 343 core.c:649 jtag_add_reset(): SRST line asserted
Debug: 118 343 core.c:660 jtag_add_reset(): JTAG reset with RESET
instead of TRST
Debug: 119 343 core.c:291 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 120 343 core.c:807 jtag_reset_callback(): -
Debug: 121 343 jlink.c:483 jlink_reset(): trst: 0, srst: 1
Debug: 122 359 core.c:649 jtag_add_reset(): SRST line asserted
Debug: 124 515 jlink.c:483 jlink_reset(): trst: 0, srst: 0
Debug: 125 530 core.c:653 jtag_add_reset(): SRST line released
Debug: 126 842 core.c:1161 jtag_init_inner(): Init JTAG chain
Debug: 127 842 core.c:291 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 128 842 core.c:807 jtag_reset_callback(): -
Info : 129 842 core.c:874 jtag_examine_chain_display(): JTAG tap:
lm3s6918.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00,
ver: 0x3)
Info : 130 842 core.c:933 jtag_examine_chain_match_tap(): JTAG
Tap/device matched
Debug: 131 842 target.c:4292 jim_target(): Target command params:
Debug: 132 842 target.c:4293 jim_target(): target names
Debug: 133 842 arm_adi_v5.c:960 ahbap_debugport_init():
Debug: 134 858 arm_adi_v5.c:1005 ahbap_debugport_init(): AHB-AP ID
Register 0x14770011, Debug ROM Address 0xe00ff003
Debug: 135 858 target.c:4292 jim_target(): Target command params:
Debug: 136 858 target.c:4293 jim_target(): target names
Debug: 137 858 target.c:3411 target_handle_event(): event: 12
reset-assert-pre - no action
Debug: 138 858 cortex_m3.c:756 cortex_m3_assert_reset(): target->state: unknown
Debug: 139 858 cortex_m3.c:178 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 140 873 target.c:1342 target_read_u32(): address: 0x400fe000,
value: 0x10010002
Debug: 141 873 cortex_m3.c:839 cortex_m3_assert_reset(): Using
Luminary Reset: SYSRESETREQ
Debug: 142 873 target.c:3411 target_handle_event(): event: 13
reset-assert-post - no action
Debug: 143 873 target.c:4292 jim_target(): Target command params:
Debug: 144 873 target.c:4293 jim_target(): target names
Debug: 145 873 target.c:3411 target_handle_event(): event: 14
reset-deassert-pre - no action
Debug: 146 873 cortex_m3.c:867 cortex_m3_deassert_reset(): target->state: reset
Debug: 147 951 jlink.c:483 jlink_reset(): trst: 0, srst: 0
Debug: 148 967 core.c:653 jtag_add_reset(): SRST line released
Debug: 149 967 target.c:3411 target_handle_event(): event: 15
reset-deassert-post - no action
Debug: 150 967 target.c:4292 jim_target(): Target command params:
Debug: 151 967 target.c:4293 jim_target(): target names
Debug: 152 967 target.c:3411 target_handle_event(): event: 21
reset-end - no action
Debug: 154 1279 cortex_m3.c:488 cortex_m3_poll(): Exit from reset with
dcb_dhcsr 0x411fc231
Debug: 155 1279 cortex_m3.c:252 cortex_m3_endreset_event(): DCB_DEMCR
= 0xfa050000
Debug: 156 1279 target.c:1419 target_write_u32(): address: 0xe0002000,
value: 0x00000003
Debug: 157 1279 target.c:1419 target_write_u32(): address: 0xe0002008,
value: 0x00000000
Debug: 158 1295 target.c:1419 target_write_u32(): address: 0xe000200c,
value: 0x00000000
Debug: 159 1295 target.c:1419 target_write_u32(): address: 0xe0002010,
value: 0x00000000
Debug: 160 1295 target.c:1419 target_write_u32(): address: 0xe0002014,
value: 0x00000000
Debug: 161 1295 target.c:1419 target_write_u32(): address: 0xe0002018,
value: 0x00000000
Debug: 162 1295 target.c:1419 target_write_u32(): address: 0xe000201c,
value: 0x00000000
Debug: 163 1310 target.c:1419 target_write_u32(): address: 0xe0002020,
value: 0x00000000
Debug: 164 1310 target.c:1419 target_write_u32(): address: 0xe0002024,
value: 0x00000000
Debug: 165 1310 target.c:1419 target_write_u32(): address: 0xe0001020,
value: 0x00000000
Debug: 166 1310 target.c:1419 target_write_u32(): address: 0xe0001024,
value: 0x00000000
Debug: 167 1310 target.c:1419 target_write_u32(): address: 0xe0001028,
value: 0x00000000
Debug: 168 1326 target.c:1419 target_write_u32(): address: 0xe0001030,
value: 0x00000000
Debug: 169 1326 target.c:1419 target_write_u32(): address: 0xe0001034,
value: 0x00000000
Debug: 170 1326 target.c:1419 target_write_u32(): address: 0xe0001038,
value: 0x00000000
Debug: 171 1326 target.c:1419 target_write_u32(): address: 0xe0001040,
value: 0x00000000
Debug: 172 1326 target.c:1419 target_write_u32(): address: 0xe0001044,
value: 0x00000000
Debug: 173 1341 target.c:1419 target_write_u32(): address: 0xe0001048,
value: 0x00000000
Debug: 174 1341 target.c:1419 target_write_u32(): address: 0xe0001050,
value: 0x00000000
Debug: 175 1341 target.c:1419 target_write_u32(): address: 0xe0001054,
value: 0x00000000
Debug: 176 1341 target.c:1419 target_write_u32(): address: 0xe0001058,
value: 0x00000000
Debug: 178 1357 command.c:68 script_debug(): command - init
Debug: 179 1357 command.c:77 script_debug(): init - argv[0]=ocd_init
=========================
// ABOVE IS BEFFORE START OF GDB - GNU gdb from (Sourcery G++ lite
2009q1-161) 6.8.50.20081022-cvs
=========================
// NOW DO:
// (gdb) file blinky.out
// (gdb) target remote localhost:3333
//==========================
Info : 180 537350 server.c:79 add_connection(): accepting 'gdb'
connection from 0
Debug: 181 537350 breakpoints.c:160 breakpoint_clear_target(): Delete
all breakpoints for target: cortex_m3
Debug: 182 537350 breakpoints.c:287 watchpoint_clear_target(): Delete
all watchpoints for target: cortex_m3
Debug: 183 537350 cortex_m3.c:532 cortex_m3_halt(): target->state: running
Debug: 184 537350 cortex_m3.c:385 cortex_m3_debug_entry():
Debug: 185 537365 cortex_m3.c:178 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 186 537365 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 0 value 0x7a11f
Debug: 187 537365 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 1 value 0x400243fc
Debug: 188 537381 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 2 value 0x0
Debug: 189 537381 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 3 value 0x3c5df
Debug: 190 537381 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 4 value 0x5139b80
Debug: 191 537381 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 5 value 0x111315e
Debug: 192 537381 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 6 value 0x1300e045
Debug: 193 537397 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 7 value 0x51810940
Debug: 194 537397 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 8 value 0xf4051988
Debug: 195 537397 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 9 value 0xc141c099
Debug: 196 537397 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 10 value 0x442de000
Debug: 197 537397 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 11 value 0xf9609d5c
Debug: 198 537412 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 12 value 0x20000000
Debug: 199 537412 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 13 value 0x200003d0
Debug: 200 537412 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 14 value 0xfffffff9
Debug: 201 537412 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 15 value 0xf0
Debug: 202 537412 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 16 value 0x81000002
Debug: 203 537428 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 17 value 0x200003d0
Debug: 204 537428 cortex_m3.c:1262 cortex_m3_load_core_reg_u32(): load
from core reg 18 value 0x54019018
Debug: 205 537428 cortex_m3.c:1288 cortex_m3_load_core_reg_u32(): load
from special reg 19 value 0x0
Debug: 206 537428 cortex_m3.c:1288 cortex_m3_load_core_reg_u32(): load
from special reg 20 value 0x0
Debug: 207 537428 cortex_m3.c:1288 cortex_m3_load_core_reg_u32(): load
from special reg 21 value 0x0
Debug: 208 537428 cortex_m3.c:1288 cortex_m3_load_core_reg_u32(): load
from special reg 22 value 0x0
Debug: 209 537443 cortex_m3.c:370
cortex_m3_examine_exception_reason(): NMI SHCSR 0x20000, SR 0x0, CFSR
0xffffffff, AR 0xffffffff
Debug: 210 537443 cortex_m3.c:447 cortex_m3_debug_entry(): entered
debug state in core mode: Handler at PC 0xf0, target->state: halted
Debug: 211 537443 target.c:838 target_call_event_callbacks(): target
event 4 (early-halted)
Debug: 212 537443 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 213 537443 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 214 537443 target.c:838 target_call_event_callbacks(): target
event 5 (halted)
Debug: 215 537443 target.c:3411 target_handle_event(): event: 5 halted
- no action
User : 216 537443 target.c:1100 target_arch_state(): target state: halted
User : 217 537443 armv7m.c:469 armv7m_arch_state(): target halted due
to debug-request, current mode: Handler NMI
xPSR: 0x81000002 pc: 0x000000f0
Debug: 218 537443 target.c:3411 target_handle_event(): event: 5 halted
- no action
Debug: 219 537443 target.c:838 target_call_event_callbacks(): target
event 10 (gdb-end)
Debug: 220 537443 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 221 537443 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 222 537443 target.c:838 target_call_event_callbacks(): target
event 26 (gdb-attach)
Debug: 223 537443 target.c:3411 target_handle_event(): event: 26
gdb-attach - no action
Debug: 224 537443 target.c:3411 target_handle_event(): event: 26
gdb-attach - no action
Debug: 225 537443 gdb_server.c:809 gdb_new_connection(): New GDB
Connection: 1, Target lm3s6918.cpu, state: halted
Debug: 226 537443 gdb_server.c:2058 gdb_input_inner(): received
packet: 'qSupported'
Debug: 227 537443 gdb_server.c:2058 gdb_input_inner(): received
packet: 'QStartNoAckMode'
Warn : 228 537443 gdb_server.c:580 gdb_get_packet_inner():
acknowledgment received, but no packet pending
Debug: 229 537443 gdb_server.c:2058 gdb_input_inner(): received packet: 'Hg0'
Debug: 230 537443 gdb_server.c:2058 gdb_input_inner(): received packet: '?'
Debug: 231 537443 gdb_server.c:2058 gdb_input_inner(): received packet: 'Hc-1'
Debug: 232 537443 gdb_server.c:2058 gdb_input_inner(): received packet: 'qC'
Debug: 233 537443 gdb_server.c:2058 gdb_input_inner(): received
packet: 'qOffsets'
Debug: 234 537443 gdb_server.c:2058 gdb_input_inner(): received packet: 'Hg0'
Debug: 235 537443 gdb_server.c:2058 gdb_input_inner(): received packet: 'g'
Debug: 236 537443 gdb_server.c:2058 gdb_input_inner(): received
packet: 'qXfer:memory-map:read::0,fff'
Debug: 237 537459 target.c:1342 target_read_u32(): address:
0x400fe000, value: 0x10010002
Debug: 238 537459 target.c:1342 target_read_u32(): address:
0x400fe004, value: 0x10e8402d
Debug: 239 537459 target.c:1342 target_read_u32(): address:
0x400fe008, value: 0x00ff007f
Debug: 240 537459 target.c:1342 target_read_u32(): address:
0x400fe010, value: 0x000132ff
Debug: 241 537459 stellaris.c:468 stellaris_read_part_info(): did0
0x10010002, did1 0x10e8402d, dc0 0xff007f, dc1 0x132ff
Debug: 242 537459 target.c:1342 target_read_u32(): address:
0x400fe134, value: 0xffffffff
Debug: 243 537475 target.c:1342 target_read_u32(): address:
0x400fe060, value: 0x01c00380
Debug: 244 537475 stellaris.c:364 stellaris_read_clock_info():
Stellaris RCC 1c00380
Debug: 245 537475 target.c:1342 target_read_u32(): address:
0x400fe064, value: 0x00000640
Debug: 246 537475 stellaris.c:366 stellaris_read_clock_info():
Stellaris PLLCFG 640
Debug: 247 537475 stellaris.c:414 stellaris_set_flash_mode(): usecrl = 49
Debug: 248 537475 target.c:1419 target_write_u32(): address:
0x400fe140, value: 0x00000031
Debug: 249 537475 target.c:1342 target_read_u32(): address:
0x400fd008, value: 0x00000000
Debug: 250 537475 gdb_server.c:2058 gdb_input_inner(): received packet: 'mf0,4'
Debug: 251 537475 gdb_server.c:1197 gdb_read_memory_packet(): addr:
0x000000f0, len: 0x00000004
Debug: 252 537475 target.c:1199 target_read_buffer(): reading buffer
of 4 byte at 0x000000f0
Debug: 253 537490 gdb_server.c:2058 gdb_input_inner(): received
packet: 'qSymbol::'
========================
// At this point gdb reported
// my code was at "NmiSR () at startup_gcc.c:190
// 190 {
========================
// now send:
// (gdb) b blinky.c:24
//=====================
Debug: 254 1006109 gdb_server.c:2058 gdb_input_inner(): received
packet: 'm168,2'
Debug: 255 1006109 gdb_server.c:1197 gdb_read_memory_packet(): addr:
0x00000168, len: 0x00000002
Debug: 256 1006109 target.c:1199 target_read_buffer(): reading buffer
of 2 byte at 0x00000168
========================
// At this point gdb reported
// Breakpoiht 1 at 0x168 file blinky.c, line 24.
========================
========================
// now send:
// (gdb) jump: startup_gcc.c:148
// This is line 148:
// void
// line148-->> ResetISR(void)
// {
// gdb reports:
// Line 148 is not in NmiISR. Jump anyway (y or n) y
// Continuing at 0xfc.
/ Note automatically using hardware breakpoints for read-only addresses.
//============================
Debug: 257 1402989 gdb_server.c:2058 gdb_input_inner(): received
packet: 'Pf=fc000000'
Debug: 258 1402989 gdb_server.c:1101 gdb_set_register_packet(): -
Debug: 259 1403005 gdb_server.c:2058 gdb_input_inner(): received
packet: 'Z1,168,2'
Debug: 260 1403005 gdb_server.c:1393 gdb_breakpoint_watchpoint_packet(): -
Debug: 261 1403005 target.c:1419 target_write_u32(): address:
0xe0002008, value: 0x40000169
Debug: 262 1403005 cortex_m3.c:926 cortex_m3_set_breakpoint(): fpc_num
0 fpcr_value 0x40000169
Debug: 263 1403005 cortex_m3.c:953 cortex_m3_set_breakpoint(): BPID:
0, Type: 0, Address: 0x00000168 Length: 2 (set=1)
Debug: 264 1403005 breakpoints.c:104 breakpoint_add(): added hardware
breakpoint at 0x00000168 of length 0x00000002, (BPID: 0)
Debug: 265 1403005 gdb_server.c:2058 gdb_input_inner(): received
packet: 'vCont?'
Debug: 266 1403005 gdb_server.c:2058 gdb_input_inner(): received packet: 'Hc0'
Debug: 267 1403005 gdb_server.c:2058 gdb_input_inner(): received packet: 'c'
Debug: 268 1403005 target.c:838 target_call_event_callbacks(): target
event 9 (gdb-start)
Debug: 269 1403005 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 270 1403005 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 271 1403005 gdb_server.c:1356 gdb_step_continue_packet(): -
Debug: 272 1403005 gdb_server.c:1370 gdb_step_continue_packet(): continue
Debug: 273 1403005 target.c:3411 target_handle_event(): event: 3
old-pre_resume - no action
Debug: 274 1403005 armv7m.c:125 armv7m_restore_context():
Debug: 275 1403005 cortex_m3.c:1327 cortex_m3_store_core_reg_u32():
write core reg 15 value 0xfc
Debug: 276 1403005 armv7m.c:234 armv7m_write_core_reg(): write core
reg 15 value 0xfc
Debug: 277 1403005 target.c:838 target_call_event_callbacks(): target
event 6 (resumed)
Debug: 278 1403005 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 279 1403020 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 280 1403020 cortex_m3.c:687 cortex_m3_resume(): target resumed at 0xfc
Debug: 281 1403051 cortex_m3.c:385 cortex_m3_debug_entry():
Debug: 282 1403051 cortex_m3.c:178 cortex_m3_clear_halt(): NVIC_DFSR 0x3
Debug: 283 1403067 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 0 value 0x20000400
Debug: 284 1403067 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 1 value 0x20000400
Debug: 285 1403067 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 2 value 0x400fe108
Debug: 286 1403067 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 3 value 0x40
Debug: 287 1403067 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 4 value 0x5139b80
Debug: 288 1403083 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 5 value 0x111315e
Debug: 289 1403083 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 6 value 0x1300e045
Debug: 290 1403083 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 7 value 0x51810940
Debug: 291 1403083 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 8 value 0xf4051988
Debug: 292 1403098 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 9 value 0xc141c099
Debug: 293 1403098 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 10 value 0x442de000
Debug: 294 1403098 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 11 value 0xf9609d5c
Debug: 295 1403098 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 12 value 0x20000000
Debug: 296 1403098 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 13 value 0x200003c0
Debug: 297 1403114 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 14 value 0x131
Debug: 298 1403114 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 15 value 0x168
Debug: 299 1403114 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 16 value 0x21000002
Debug: 300 1403114 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 17 value 0x200003c0
Debug: 301 1403129 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 18 value 0x54019018
Debug: 302 1403129 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 19 value 0x0
Debug: 303 1403129 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 20 value 0x0
Debug: 304 1403129 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 21 value 0x0
Debug: 305 1403129 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 22 value 0x0
Debug: 306 1403145 cortex_m3.c:370
cortex_m3_examine_exception_reason(): NMI SHCSR 0x20000, SR 0x0, CFSR
0xffffffff, AR 0xffffffff
Debug: 307 1403145 cortex_m3.c:447 cortex_m3_debug_entry(): entered
debug state in core mode: Handler at PC 0x168, target->state: halted
Debug: 308 1403145 target.c:838 target_call_event_callbacks(): target
event 4 (early-halted)
Debug: 309 1403145 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 310 1403145 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 311 1403145 target.c:838 target_call_event_callbacks(): target
event 5 (halted)
Debug: 312 1403145 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 313 1403145 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 314 1403145 target.c:838 target_call_event_callbacks(): target
event 10 (gdb-end)
Debug: 315 1403145 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 316 1403145 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 317 1403145 gdb_server.c:2058 gdb_input_inner(): received packet: 'g'
Debug: 318 1403145 gdb_server.c:2058 gdb_input_inner(): received
packet: 'z1,168,2'
Debug: 319 1403145 gdb_server.c:1393 gdb_breakpoint_watchpoint_packet(): -
Debug: 320 1403145 cortex_m3.c:977 cortex_m3_unset_breakpoint(): BPID:
0, Type: 0, Address: 0x00000168 Length: 2 (set=1)
Debug: 321 1403145 target.c:1419 target_write_u32(): address:
0xe0002008, value: 0x00000000
Debug: 322 1403145 breakpoints.c:128 breakpoint_free(): BPID: 0
Debug: 323 1403161 gdb_server.c:2058 gdb_input_inner(): received
packet: 'm168,4'
Debug: 324 1403161 gdb_server.c:1197 gdb_read_memory_packet(): addr:
0x00000168, len: 0x00000004
Debug: 325 1403161 target.c:1199 target_read_buffer(): reading buffer
of 4 byte at 0x00000168
========================
// At this point gdb reported
// Breakpoiht 1, in main () at blinky.c:24
// 24 LED_PORT_DATA ^= LED_PIN; // Toggle LED
//(gdb)
//
// THE BREAK POINT WORKED !!!!!!! ONE TIME
//
// BUT NOW IF I CONTINUE ON IN MY CODE AT THIS POINT THE BREAK POINT
SHOULD STILL BE
// ACTIVE AND IT SHOULD HIT AGAIN AFTER THE DELAY LOOP AT LINE 26:
// 22: while (1)
// 23: {
// 24: LED_PORT_DATA ^= LED_PIN; // Toggle LED
// 25: delay(DELAY_COUNT); // Wait...
// 26: }
========================
// LETS TRY IT
// NOW DO
//
// (gdb) continue
//=======================
// NOTE BREAKPOINT DID NOT HIT. INSTEAD THE PROGRAM FREE RAN WITH THE
BLINKING LED BLINKING REPETATIVLY.
// TO HALT I DO
// (gdb) ctrl C (^C)
//
// gdb reports:
// Program recievied signal SIGINT, Interrupt.
// 0x000001b6 in delay (cnt=value optimised out)) at blinky.c:47
// 47 for(i=0,j=0; i < cnt; i++)
// So here is the open ocd response to gdb continue and ^c:
//========================
Debug: 326 2046957 gdb_server.c:2058 gdb_input_inner(): received packet: 'Hc0'
Debug: 327 2046957 gdb_server.c:2058 gdb_input_inner(): received packet: 's'
Debug: 328 2046957 target.c:838 target_call_event_callbacks(): target
event 9 (gdb-start)
Debug: 329 2046957 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 330 2046957 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 331 2046957 gdb_server.c:1356 gdb_step_continue_packet(): -
Debug: 332 2046957 gdb_server.c:1376 gdb_step_continue_packet(): step
Debug: 333 2046957 armv7m.c:125 armv7m_restore_context():
Debug: 334 2046957 target.c:838 target_call_event_callbacks(): target
event 6 (resumed)
Debug: 335 2046957 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 336 2046957 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 337 2046957 cortex_m3.c:739 cortex_m3_step(): target stepped
dcb_dhcsr = 0x1030007 nvic_icsr = 0x0
Debug: 338 2046957 cortex_m3.c:385 cortex_m3_debug_entry():
Debug: 339 2046973 cortex_m3.c:178 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 340 2046973 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 0 value 0x20000400
Debug: 341 2046973 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 1 value 0x400243fc
Debug: 342 2046988 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 2 value 0x400fe108
Debug: 343 2046988 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 3 value 0x40
Debug: 344 2046988 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 4 value 0x5139b80
Debug: 345 2046988 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 5 value 0x111315e
Debug: 346 2046988 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 6 value 0x1300e045
Debug: 347 2047004 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 7 value 0x51810940
Debug: 348 2047004 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 8 value 0xf4051988
Debug: 349 2047004 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 9 value 0xc141c099
Debug: 350 2047004 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 10 value 0x442de000
Debug: 351 2047004 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 11 value 0xf9609d5c
Debug: 352 2047004 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 12 value 0x20000000
Debug: 353 2047019 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 13 value 0x200003c0
Debug: 354 2047019 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 14 value 0x131
Debug: 355 2047019 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 15 value 0x16a
Debug: 356 2047019 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 16 value 0x21000002
Debug: 357 2047019 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 17 value 0x200003c0
Debug: 358 2047035 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 18 value 0x54019018
Debug: 359 2047035 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 19 value 0x0
Debug: 360 2047035 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 20 value 0x0
Debug: 361 2047035 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 21 value 0x0
Debug: 362 2047035 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 22 value 0x0
Debug: 363 2047051 cortex_m3.c:370
cortex_m3_examine_exception_reason(): NMI SHCSR 0x20000, SR 0x0, CFSR
0xffffffff, AR 0xffffffff
Debug: 364 2047051 cortex_m3.c:447 cortex_m3_debug_entry(): entered
debug state in core mode: Handler at PC 0x16a, target->state: halted
Debug: 365 2047051 target.c:838 target_call_event_callbacks(): target
event 4 (early-halted)
Debug: 366 2047051 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 367 2047051 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 368 2047051 target.c:838 target_call_event_callbacks(): target
event 5 (halted)
Debug: 369 2047051 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 370 2047051 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 371 2047051 target.c:838 target_call_event_callbacks(): target
event 10 (gdb-end)
Debug: 372 2047051 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 373 2047051 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 374 2047051 cortex_m3.c:744 cortex_m3_step(): target stepped
dcb_dhcsr = 0x30003 nvic_icsr = 0x0
Debug: 375 2047051 gdb_server.c:2058 gdb_input_inner(): received packet: 'g'
Debug: 376 2047051 gdb_server.c:2058 gdb_input_inner(): received
packet: 'Z1,168,2'
Debug: 377 2047051 gdb_server.c:1393 gdb_breakpoint_watchpoint_packet(): -
Debug: 378 2047051 target.c:1419 target_write_u32(): address:
0xe0002008, value: 0x40000169
Debug: 379 2047051 cortex_m3.c:926 cortex_m3_set_breakpoint(): fpc_num
0 fpcr_value 0x40000169
Debug: 380 2047051 cortex_m3.c:953 cortex_m3_set_breakpoint(): BPID:
1, Type: 0, Address: 0x00000168 Length: 2 (set=1)
Debug: 381 2047051 breakpoints.c:104 breakpoint_add(): added hardware
breakpoint at 0x00000168 of length 0x00000002, (BPID: 1)
Debug: 382 2047051 gdb_server.c:2058 gdb_input_inner(): received packet: 'Hc0'
Debug: 383 2047051 gdb_server.c:2058 gdb_input_inner(): received packet: 'c'
Debug: 384 2047051 target.c:838 target_call_event_callbacks(): target
event 9 (gdb-start)
Debug: 385 2047051 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 386 2047051 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 387 2047051 gdb_server.c:1356 gdb_step_continue_packet(): -
Debug: 388 2047051 gdb_server.c:1370 gdb_step_continue_packet(): continue
Debug: 389 2047051 target.c:3411 target_handle_event(): event: 3
old-pre_resume - no action
Debug: 390 2047051 armv7m.c:125 armv7m_restore_context():
Debug: 391 2047051 target.c:838 target_call_event_callbacks(): target
event 6 (resumed)
Debug: 392 2047051 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 393 2047051 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 394 2047051 cortex_m3.c:687 cortex_m3_resume(): target resumed at 0x16b
Debug: 395 2051746 gdb_server.c:2058 gdb_input_inner(): received packet: ''
Debug: 396 2051746 cortex_m3.c:532 cortex_m3_halt(): target->state: running
Debug: 397 2051777 cortex_m3.c:385 cortex_m3_debug_entry():
Debug: 398 2051777 cortex_m3.c:178 cortex_m3_clear_halt(): NVIC_DFSR 0x1
Debug: 399 2051793 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 0 value 0x7a11f
Debug: 400 2051793 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 1 value 0x400243fc
Debug: 401 2051793 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 2 value 0x0
Debug: 402 2051793 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 3 value 0x2ea53
Debug: 403 2051793 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 4 value 0x5139b80
Debug: 404 2051809 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 5 value 0x111315e
Debug: 405 2051809 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 6 value 0x1300e045
Debug: 406 2051809 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 7 value 0x51810940
Debug: 407 2051809 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 8 value 0xf4051988
Debug: 408 2051809 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 9 value 0xc141c099
Debug: 409 2051824 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 10 value 0x442de000
Debug: 410 2051824 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 11 value 0xf9609d5c
Debug: 411 2051824 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 12 value 0x20000000
Debug: 412 2051824 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 13 value 0x200003c0
Debug: 413 2051824 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 14 value 0x131
Debug: 414 2051840 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 15 value 0x1b6
Debug: 415 2051840 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 16 value 0x81000002
Debug: 416 2051840 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 17 value 0x200003c0
Debug: 417 2051840 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 18 value 0x54019018
Debug: 418 2051840 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 19 value 0x0
Debug: 419 2051840 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 20 value 0x0
Debug: 420 2051855 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 21 value 0x0
Debug: 421 2051855 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 22 value 0x0
Debug: 422 2051855 cortex_m3.c:370
cortex_m3_examine_exception_reason(): NMI SHCSR 0x20000, SR 0x0, CFSR
0xffffffff, AR 0xffffffff
Debug: 423 2051855 cortex_m3.c:447 cortex_m3_debug_entry(): entered
debug state in core mode: Handler at PC 0x1b6, target->state: halted
Debug: 424 2051855 target.c:838 target_call_event_callbacks(): target
event 4 (early-halted)
Debug: 425 2051855 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 426 2051855 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 427 2051855 target.c:838 target_call_event_callbacks(): target
event 5 (halted)
Debug: 428 2051855 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 429 2051855 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 430 2051855 target.c:838 target_call_event_callbacks(): target
event 10 (gdb-end)
Debug: 431 2051855 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 432 2051855 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 433 2051855 gdb_server.c:2058 gdb_input_inner(): received packet: 'g'
Debug: 434 2051871 gdb_server.c:2058 gdb_input_inner(): received
packet: 'z1,168,2'
Debug: 435 2051871 gdb_server.c:1393 gdb_breakpoint_watchpoint_packet(): -
Debug: 436 2051871 cortex_m3.c:977 cortex_m3_unset_breakpoint(): BPID:
1, Type: 0, Address: 0x00000168 Length: 2 (set=1)
Debug: 437 2051871 target.c:1419 target_write_u32(): address:
0xe0002008, value: 0x00000000
Debug: 438 2051871 breakpoints.c:128 breakpoint_free(): BPID: 1
//==============
// Now then , I am observing the break point to work again without
further clearing/setting
// If I do the following:
//
// (gdb) jump startup_gcc.c:148
//==============
// openOCD responded:
//====================
Debug: 439 2542640 gdb_server.c:2058 gdb_input_inner(): received
packet: 'Pf=fc000000'
Debug: 440 2542640 gdb_server.c:1101 gdb_set_register_packet(): -
Debug: 441 2542640 gdb_server.c:2058 gdb_input_inner(): received
packet: 'Z1,168,2'
Debug: 442 2542640 gdb_server.c:1393 gdb_breakpoint_watchpoint_packet(): -
Debug: 443 2542640 target.c:1419 target_write_u32(): address:
0xe0002008, value: 0x40000169
Debug: 444 2542640 cortex_m3.c:926 cortex_m3_set_breakpoint(): fpc_num
0 fpcr_value 0x40000169
Debug: 445 2542640 cortex_m3.c:953 cortex_m3_set_breakpoint(): BPID:
2, Type: 0, Address: 0x00000168 Length: 2 (set=1)
Debug: 446 2542640 breakpoints.c:104 breakpoint_add(): added hardware
breakpoint at 0x00000168 of length 0x00000002, (BPID: 2)
Debug: 447 2542640 gdb_server.c:2058 gdb_input_inner(): received packet: 'c'
Debug: 448 2542640 target.c:838 target_call_event_callbacks(): target
event 9 (gdb-start)
Debug: 449 2542640 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 450 2542640 target.c:3411 target_handle_event(): event: 9
gdb-start - no action
Debug: 451 2542640 gdb_server.c:1356 gdb_step_continue_packet(): -
Debug: 452 2542640 gdb_server.c:1370 gdb_step_continue_packet(): continue
Debug: 453 2542640 target.c:3411 target_handle_event(): event: 3
old-pre_resume - no action
Debug: 454 2542640 armv7m.c:125 armv7m_restore_context():
Debug: 455 2542640 cortex_m3.c:1327 cortex_m3_store_core_reg_u32():
write core reg 15 value 0xfc
Debug: 456 2542640 armv7m.c:234 armv7m_write_core_reg(): write core
reg 15 value 0xfc
Debug: 457 2542655 target.c:838 target_call_event_callbacks(): target
event 6 (resumed)
Debug: 458 2542655 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 459 2542655 target.c:3411 target_handle_event(): event: 6
resumed - no action
Debug: 460 2542655 cortex_m3.c:687 cortex_m3_resume(): target resumed at 0xfc
Debug: 461 2542733 cortex_m3.c:385 cortex_m3_debug_entry():
Debug: 462 2542733 cortex_m3.c:178 cortex_m3_clear_halt(): NVIC_DFSR 0x3
Debug: 463 2542749 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 0 value 0x20000400
Debug: 464 2542749 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 1 value 0x20000400
Debug: 465 2542749 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 2 value 0x400fe108
Debug: 466 2542749 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 3 value 0x40
Debug: 467 2542749 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 4 value 0x5139b80
Debug: 468 2542765 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 5 value 0x111315e
Debug: 469 2542765 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 6 value 0x1300e045
Debug: 470 2542765 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 7 value 0x51810940
Debug: 471 2542765 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 8 value 0xf4051988
Debug: 472 2542765 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 9 value 0xc141c099
Debug: 473 2542780 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 10 value 0x442de000
Debug: 474 2542780 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 11 value 0xf9609d5c
Debug: 475 2542780 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 12 value 0x20000000
Debug: 476 2542780 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 13 value 0x200003b0
Debug: 477 2542780 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 14 value 0x131
Debug: 478 2542796 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 15 value 0x168
Debug: 479 2542796 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 16 value 0x21000002
Debug: 480 2542796 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 17 value 0x200003b0
Debug: 481 2542796 cortex_m3.c:1262 cortex_m3_load_core_reg_u32():
load from core reg 18 value 0x54019018
Debug: 482 2542796 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 19 value 0x0
Debug: 483 2542796 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 20 value 0x0
Debug: 484 2542811 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 21 value 0x0
Debug: 485 2542811 cortex_m3.c:1288 cortex_m3_load_core_reg_u32():
load from special reg 22 value 0x0
Debug: 486 2542811 cortex_m3.c:370
cortex_m3_examine_exception_reason(): NMI SHCSR 0x20000, SR 0x0, CFSR
0xffffffff, AR 0xffffffff
Debug: 487 2542811 cortex_m3.c:447 cortex_m3_debug_entry(): entered
debug state in core mode: Handler at PC 0x168, target->state: halted
Debug: 488 2542811 target.c:838 target_call_event_callbacks(): target
event 4 (early-halted)
Debug: 489 2542811 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 490 2542811 target.c:3411 target_handle_event(): event: 4
early-halted - no action
Debug: 491 2542811 target.c:838 target_call_event_callbacks(): target
event 5 (halted)
Debug: 492 2542811 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 493 2542811 target.c:3411 target_handle_event(): event: 5
halted - no action
Debug: 494 2542811 target.c:838 target_call_event_callbacks(): target
event 10 (gdb-end)
Debug: 495 2542811 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 496 2542811 target.c:3411 target_handle_event(): event: 10
gdb-end - no action
Debug: 497 2542811 gdb_server.c:2058 gdb_input_inner(): received packet: 'g'
Debug: 498 2542811 gdb_server.c:2058 gdb_input_inner(): received
packet: 'z1,168,2'
Debug: 499 2542811 gdb_server.c:1393 gdb_breakpoint_watchpoint_packet(): -
Debug: 500 2542811 cortex_m3.c:977 cortex_m3_unset_breakpoint(): BPID:
2, Type: 0, Address: 0x00000168 Length: 2 (set=1)
Debug: 501 2542811 target.c:1419 target_write_u32(): address:
0xe0002008, value: 0x00000000
Debug: 502 2542811 breakpoints.c:128 breakpoint_free(): BPID: 2
Debug: 503 2542827 gdb_server.c:2058 gdb_input_inner(): received
packet: 'm168,4'
Debug: 504 2543451 gdb_server.c:1197 gdb_read_memory_packet(): addr:
0x00000168, len: 0x00000004
Debug: 505 2543451 target.c:1199 target_read_buffer(): reading buffer
of 4 byte at 0x00000168
========================
// At this point gdb reported AGAIN GOOD !
// Breakpoiht 1, in main () at blinky.c:24
// 24 LED_PORT_DATA ^= LED_PIN; // Toggle LED
//(gdb)
//
// THE BREAK POINT WORKED AGAIN BUT ONLY IF IT CAME ABOUT BY
// CALLING THE STARTUP CODE FIRST - THIS IS NOT NORMAL $$$$$$$$$$$$$$$$$$$
//====================
// ANY IDEAS AS TO WHAT IS GOING ON WILL HELP
Best regards,
Joe
_______________________________________________
Openocd-development mailing list
Openocd-development@lists.berlios.de
https://lists.berlios.de/mailman/listinfo/openocd-development
