It could be don't care, but it will be better to fix/drive TMS at '1'. Putting the JTAG TAP in RESET State.
After JTAG power domain sequence (100x TCK TMS '1'), we will enter in JTAG Startup sequence (Minimum of 5x TCK with TMS at '1'). After what we can start the Debug Startup sequence. (drive EMU0, EMU1, TRST, SRST ...). Finally, we will enter in the Debug sequencessssssssss ;-) Regards, Laurent htpp://www.amontec.com Amontec JTAGkey (Full-Speed USB JTAG Adapter 6MHz TCK) Amontec JTAGkey2 (High-Speed USB JTAG Adapter 30MHz TCK) > From my experiments, it appears to be don't-care for TMS. They just > need 100 TCK pulses to flip the bit to enable the JTAG power domain. > -- > Rick Altherr > kc8apf at kc8apf.net > <https://lists.berlios.de/mailman/listinfo/openocd-development> > > "He said he hadn't had a byte in three days. I had a short, so I split > it with him." > -- Unsigned > > > > On Jun 10, 2009, at 1:28 PM, David Brownell wrote: > > >/ On Wednesday 10 June 2009, David Brownell wrote: > />>/ http://tiexpressdsp.com/index.php/ICEPICK > />>/ > />>/ The "how to add devices to an ICEpick-C scan chain" highlights > />>/ one point: the JRC commands to add the ARM (and, for DaVinci, > />>/ the ETB) to the scan chain must be done each time the TAPs go > />>/ to the RESET state (via TMS or nTRST). > />/ > />/ Hmm, and also: > />/ > />/ Before starting the debugger, the debug power domain must > />/ be activated by applying a minimum of 100 (free running) > />/ TCK pulses to the device after nTRST is pulled high. > />/ > />/ It's not clear whether that means TMS high, low, or don't-care. > />/ Does anyone know? > />/ > />/ If it's not "TMS low" then I wonder if it's practical to make normal > />/ startup processing -- or entry to JTAG's RESET state -- always do > />/ that. Could it hurt anything? > />/ > />/ If "TMS low" works then it's a bit sad that JRCs aren't targets. > />/ Else the reset-deassert-post handler could just "runtest 100"; > />/ those handlers don't kick in for TAPs, just targets. (Which > />/ seems like a non-useful restriction, FWIW.) > />/ > />/ - Dave > />/ > />/ _______________________________________________ > />/ Openocd-development mailing list > />/ Openocd-development at lists.berlios.de > <https://lists.berlios.de/mailman/listinfo/openocd-development> > />/ https://lists.berlios.de/mailman/listinfo/openocd-development > / _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
