> >> Hi > >> > >> The number of bits used for TAR autoincrement when using > >> CSW_ADDRINC_PACKED must be at least 10 according to ARM ADI > >> specifications. Cortex-M3 uses 12 bits (4k blocks) and > OMAP35xx uses > >> 10 bits (1k blocks). > >> > >> This patch adds support for different TAR autotincrement sizes and > >> sets it to 12 bits for Cortex-M3. > >> > > > > Please remove the #define TAR_AUTOINCR_BLOCK and put the following > > line in a static function. Use a temporary variable. > > > > + /* Adjust to read blocks within boundaries > aligned to > > the TAR autoincremnent size*/ > > + blocksize = (TAR_AUTOINCR_BLOCK - > > ((TAR_AUTOINCR_BLOCK-1) & address)) >> 2; > > > > > > > > Thanks. > > > > Z > > > New version >
committed r2051 Cheers Spen _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
