On Fri, May 29, 2009 at 7:22 AM, Duane Ellis <open...@duaneellis.com> wrote:
> No - actually it is useful for other purposes... a method to flash something > - however slow it may be - is better then no method to flash something, or > the ability to flash a board with a CPU you do not support. > > UrJTAG's approach is to read the BSDL file -figure out the bus structure - > and read and write memory locations. One could - create some interesting > things. > > And - most importantly - it can be used to create a "debug tool" useful for > board bring up. For example - you have a new board you are trying to bring > up - nothing works - you can use BSDL - to wiggle/pulse a pin and probe it > out. > > I'd be *REALLY* happy if I could create a JTAG hardware test - using BSDL > files... > > Granted, for "production purposes" - it would be very slow. But - for > "simple prototype work" - it would be great. Sure, production hardware jtag > tests that take 10 minutes are *TOO*LONG* - however - the ability to perform > a hardware jtag test on a *SIMPLE* 5 piece prototype build - is another > matter. I'd let it run over lunch - or while I am in a meeting, when I'm > back I know know my prototype is "mostly working" :-) YEA!!!!! > > That does not yet exist. How does those higher end tester like Agilent 3070 in circuit tester work? Do they require extra add-on for JTAG related stuff like Boundary Scan? Do they use BDSL files? I know they can flash some MCUs but not all. Last time we have to use off-line programming for TMS470R1A64/A256 since the support was not ready yet. -- Xiaofan http://mcuee.blogspot.com _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development