The current macro uses a wrong value, and thus can generate
invalid MIPS instructions.
---
 src/target/mips32.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 7a4dd5e..e13707d 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -94,7 +94,7 @@ typedef struct mips32_core_reg_s
 #define MIPS32_COP0_MF 0x00
 #define MIPS32_COP0_MT 0x04
 
-#define MIPS32_R_INST(opcode, rs, rt, rd, shamt, funct)        (((opcode)<<26) 
|((rs)<<21)|((rt)<<16)|((rd)<<11)| ((shamt)<<5) | (funct))
+#define MIPS32_R_INST(opcode, rs, rt, rd, shamt, funct)        (((opcode)<<26) 
|((rs)<<21)|((rt)<<16)|((rd)<<11)| ((shamt)<<6) | (funct))
 #define MIPS32_I_INST(opcode, rs, rt, immd)    (((opcode)<<26) 
|((rs)<<21)|((rt)<<16)|(immd))
 #define MIPS32_J_INST(opcode, addr)    (((opcode)<<26) |(addr))
 
-- 
1.5.3.2

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