Hi, Is it possible to find out the exact assembly code that kills OpenOCD ? Let me guess that I could be an immediate shift or MOVS in thumb mode .
I am not an expert on the single step PC prediction code in arm_simulate_step(target_t *target, u32 *dry_run_pc) but there are some tumb instructions that does not have an Rn argument. See arm_dissassembler.c:1444 in evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) This will give a value of -1 for the register number instruction.info.data_proc.Rn at line 418 in arm_simulator.c . Regards, Magnus Ken Smith wrote: > On Mon, Apr 13, 2009 at 2:23 PM, Hermann Kraus <h...@scribus.info> wrote: > >> On Mon, 13 Apr 2009 23:11:29 +0200, Ken Smith <kgsm...@gmail.com> wrote: >> >>> This crash kills openocd every time. Any ideas? >>> >> I have the same problem and one more person on this list also reported it. >> It crashes at exactly the same location. I hope someone fixes this soon, as >> I currently don't have the time to debug this problem. >> >> Here's the thread where I reported the problem: >> https://lists.berlios.de/pipermail/openocd-development/2009-April/005257.html >> > > Sorry for the duplication. I'm also keenly interested in a fix to > this. Is anyone out there working on this? (assume: usual > disclaimers about FOSS) > > Many thanks for the quick response. > > Warm regards, > Ken > _______________________________________________ > Openocd-development mailing list > Openocd-development@lists.berlios.de > https://lists.berlios.de/mailman/listinfo/openocd-development > _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
