Hi, all! I write support for mc13224 - arm7tdmi-based ieee8021.15.4 -compliant communication chip. Chip is quite new, documentation is in weird state and is not full, but core and basic peripherals like SPI are documented normally. I already managed to make core work, but I can't manage it to reset properly.
1. It does not have TRST, only SRST, and it works (resets), but then OpenOCD is unable to talk to it anymore, full restart of openocd and board reset button press works to some extent. 2. halt works only first time, then the same problem is as with reset. Startup process and limitations is not described in manual. Now I have managed to make GPIO and SPI work via mww, can write stuff to internal RAM and run it, so basically it works. Could anybody advice how to debug/gather information to fix this issue? I could provide -d3 log of openocd, but it just tells that chip is in invalid mode. (will submit in another email as soon as I get home). Freescale chose strategy of making very hard to work with this chip, demanding closed binaries every now and then, and depending on IAR Workbench for closed libraries, etc, but I'd like to make it work fully (at least as just controller) hoping to reverse engineer the rest for proper gcc support, because it is only integrated chip on market at the moment, and I'd like to experiment with this kind of stuff. By any chance if anybody had any experience with this particular chip, have any information, I'd like to know about it. Thanks a lot. S. _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development